2 * Copyright 2007 Free Software Foundation, Inc.
4 * This program is free software: you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 3 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 #include "memory_map.h"
22 #include "buffer_pool.h"
27 #include "u2_eth_packet.h"
28 #include "memcpy_wa.h"
33 // ----------------------------------------------------------------
35 unsigned char dst_mac_addr[6] = {
36 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
39 // ----------------------------------------------------------------
41 // #define PACKET_SIZE 1500 // bytes
42 // #define ETH_DATA_RATE 1000000 // 1MB/s
43 // #define ETH_PACKET_RATE (ETH_DATA_RATE/PACKET_SIZE) // 13,3333 pkts/s
45 // static int timer_delta = MASTER_CLK_RATE/ETH_PACKET_RATE; // ticks between interrupts
47 static int timer_delta = MASTER_CLK_RATE/1000; // tick at 1kHz
49 static volatile bool send_packet_now = false; // timer handler sets this
50 static volatile bool link_is_up = false; // eth handler sets this
52 int packet_number = 0;
54 // ----------------------------------------------------------------
56 // debugging output on tx pins
57 #define LS_MASK 0xE0000
58 #define LS_1000 0x80000
59 #define LS_100 0x40000
64 * Called when eth phy state changes (w/ interrupts disabled)
67 link_changed_callback(int speed)
92 hal_gpio_set_tx(v, LS_MASK); /* set debug bits on d'board */
94 putstr("\neth link changed: speed = ");
99 timer_irq_handler(unsigned irq)
101 hal_set_timeout(timer_delta); // schedule next timeout
107 buffer_irq_handler(unsigned irq)
113 init_packet(int *buf, const u2_eth_packet_t *pkt, int bufnum)
116 int mark = ((bufnum & 0xff) << 24) | 0x005A0000;
118 for (i = 0; i < BP_NLINES; i++){
123 // copy header into buffer
124 memcpy_wa(buf, pkt, sizeof(*pkt));
132 u2_eth_packet_t pkt __attribute__((aligned (4)));
134 for (i = 0; i < 6; i++){
135 pkt.ehdr.dst.addr[i] = dst_mac_addr[i];
137 pkt.ehdr.src = *ethernet_mac_addr();
138 pkt.ehdr.ethertype = U2_ETHERTYPE;
140 // fill ALL buffers for debugging
141 for (i = 0; i < 8; i++)
142 init_packet((void *)buffer_ram(i), &pkt, i);
145 static int led_counter = 0;
154 // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
155 //hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
156 //hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
158 putstr("\ngen_eth_packets\n");
161 output_regs->leds = 0x00;
165 // pic_register_handler(IRQ_BUFFER, buffer_irq_handler); // poll for now
166 pic_register_handler(IRQ_TIMER, timer_irq_handler);
167 hal_set_timeout(timer_delta);
169 ethernet_register_link_changed_callback(link_changed_callback);
173 eth_mac->pause_frame_send_en = 1;
174 eth_mac->pause_quanta_set = 16384 / 512;
176 // eth_mac->speed = 4; // FIXME hardcode mac speed to 1000
179 if (link_is_up && send_packet_now){
180 send_packet_now = false;
184 eth_mac->xon_cpu = 1;
186 eth_mac->xon_cpu = 0;
190 // kick off the next packet
191 // FIXME set packet number in packet
194 bp_send_from_buf(0, PORT_ETH, 1, 0, 255); // 1KB total
196 while ((buffer_pool_status->status & (BPS_DONE_0|BPS_ERROR_0)) == 0)
201 output_regs->leds = ((++led_counter) & 0x1) | (link_is_up ? 0x2 : 0x0);