1 # This is the template file for creating symbols with tragesym
2 # every line starting with '#' is a comment line.
5 # rotate_labels rotates the pintext of top and bottom pins
6 # wordswap swaps labels if the pin is on the right side an looks like this:
14 pinwidthhorizontal=400
17 # name will be printed in the top of the symbol
18 # if you have a device with slots, you'll have to use slot= and slotdef=
19 # use comment= if there are special information you want to add
25 description=EP2C20 Cyclone II FPGA
26 documentation=http://www.altera.com
39 # tabseparated list of pin descriptions
40 # pinnr is the physical number of the pin
41 # seq is the pinseq= attribute, leave it blank if it doesn't matter
42 # type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
43 # style can be (line,dot,clk,dotclk,none). none if only want to add a net
44 # posit. can be (l,r,t,b) or empty for nets
45 # net specifies the name of the Vcc or GND name
46 # label represents the pinlabel.
47 # negation lines can be added with _Q_
48 # if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
49 #-----------------------------------------------------
50 #pinnr seq type style posit. net label
51 #-----------------------------------------------------
52 W12 clk clk r CLK13/LVDSCLK6P
53 V12 clk clk r CLK12/_LVDSCLK6N_
54 AB12 io line l IO/LVDS108P
55 AA12 io line l IO/_LVDS108N_
56 AB13 io line l IO/LVDS107P
57 AA13 io line l IO/_LVDS107N_
58 T12 io line l IO/LVDS106P
59 U13 io line l IO/_LVDS106N_
60 Y13 io line l IO/VREFB7N1
62 AB14 io line l IO/LVDS105P
63 AA14 io line l IO/_LVDS105N_
64 AB15 io line l IO/LVDS104P
65 AA15 io line l IO/_LVDS104N_
66 AB16 io line l IO/LVDS103P
67 AA16 io line l IO/_LVDS103N_
68 W14 io line l IO/LVDS102P
69 V14 io line l IO/_LVDS102N_
70 AB17 io line l IO/LVDS101P
71 AA17 io line l IO/_LVDS101N_
73 U14 io line l IO/LVDS100P
74 T15 io line l IO/_LVDS100N_
75 Y14 io line l IO/LVDS99P
76 W15 io line l IO/_LVDS99N_
77 R14 io line l IO/LVDS98P
78 R15 io line l IO/_LVDS98N_
79 AB18 io line l IO/LVDS97P
80 AA18 io line l IO/_LVDS97N_
81 Y16 io line l IO/VREFB7N0