2 // Copyright 2009 Free Software Foundation, Inc.
4 // This file is part of GNU Radio
6 // GNU Radio is free software; you can redistribute it and/or modify
7 // it under the terms of the GNU General Public License as published by
8 // the Free Software Foundation; either asversion 3, or (at your option)
11 // GNU Radio is distributed in the hope that it will be useful,
12 // but WITHOUT ANY WARRANTY; without even the implied warranty of
13 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 // GNU General Public License for more details.
16 // You should have received a copy of the GNU General Public License
17 // along with GNU Radio; see the file COPYING. If not, write to
18 // the Free Software Foundation, Inc., 51 Franklin Street,
19 // Boston, MA 02110-1301, USA.
25 #include "db_wbxng_adf4350.h"
26 #include <db_base_impl.h>
29 #define FREQ_C(freq) uint64_t(freq)
30 #define DIV_ROUND(num, denom) (((num) + ((denom)/2))/(denom))
31 #define MIN_INT_DIV uint16_t(23) /* minimum int divider, prescaler 4/5 only */
32 #define MAX_RF_DIV uint8_t(16) /* max rf divider, divides rf output */
33 #define MIN_VCO_FREQ FREQ_C(2.2e9) /* minimum vco freq */
34 #define MAX_VCO_FREQ FREQ_C(4.4e9) /* minimum vco freq */
35 #define MAX_FREQ DIV_ROUND(MAX_VCO_FREQ, 1) /* upper bound freq (rf div = 1) */
36 #define MIN_FREQ DIV_ROUND(MIN_VCO_FREQ, MAX_RF_DIV) /* calculated lower bound freq */
38 #define CE_PIN (1 << 3)
39 #define PDB_RF_PIN (1 << 2)
40 #define MUX_PIN (1 << 1)
41 #define LD_PIN (1 << 0)
45 d_regs = new adf4350_regs();
54 adf4350::compute_register(uint8_t addr)
56 uint32_t data = d_regs->compute_register(addr);
60 // create std::string from data here
62 s[0] = (char)((data >> 24) & 0xff);
63 s[1] = (char)((data >> 16) & 0xff);
64 s[2] = (char)((data >> 8) & 0xff);
65 s[3] = (char)(data & 0xff);
66 return std::string(s, 4);
70 adf4350::_get_max_freq(void)
76 adf4350::_get_min_freq(void)
82 adf4350::_set_freq(freq_t freq, freq_t refclock_freq)
84 /* Set the frequency by setting int, frac, mod, r, div */
85 if (freq > MAX_FREQ || freq < MIN_FREQ) return false;
87 d_regs->d_prescaler = 0;
88 if (freq > FREQ_C(3e9)) {
90 d_regs->d_prescaler = 1;
92 /* Ramp up the RF divider until the VCO is within range. */
93 d_regs->d_divider_select = 0;
94 while (freq < MIN_VCO_FREQ){
95 freq <<= 1; //double the freq
96 d_regs->d_divider_select++; //double the divider
98 /* Ramp up the R divider until the N divider is at least the minimum. */
99 //d_regs->d_10_bit_r_counter = refclock_freq*MIN_INT_DIV/freq;
100 d_regs->d_10_bit_r_counter = 2;
103 d_regs->d_10_bit_r_counter++;
105 n_mod *= d_regs->d_10_bit_r_counter;
106 n_mod *= d_regs->d_mod;
107 n_mod /= refclock_freq;
108 /* calculate int and frac */
109 d_regs->d_int = n_mod/d_regs->d_mod;
110 d_regs->d_frac = (n_mod - (freq_t)d_regs->d_int*d_regs->d_mod) & uint16_t(0xfff);
113 "VCO %lu KHz, Int %u, Frac %u, Mod %u, R %u, Div %u\n",
114 freq, d_regs->d_int, d_regs->d_frac,
115 d_regs->d_mod, d_regs->d_10_bit_r_counter, (1 << d_regs->d_divider_select)
118 }while(d_regs->d_int < min_int_div);
119 /* calculate the band select so PFD is under 125 KHz */
120 d_regs->d_8_bit_band_select_clock_divider_value = \
121 refclock_freq/(FREQ_C(30e3)*d_regs->d_10_bit_r_counter) + 1;
123 fprintf(stderr, "Band Selection: Div %u, Freq %lu\n",
124 d_regs->d_8_bit_band_select_clock_divider_value,
125 refclock_freq/(d_regs->d_8_bit_band_select_clock_divider_value * d_regs->d_10_bit_r_counter) + 1
132 adf4350::_get_freq(freq_t refclock_freq)
134 /* Calculate the freq from int, frac, mod, ref, r, div:
135 * freq = (int + frac/mod) * (ref/r)
136 * Keep precision by doing multiplies first:
137 * freq = (((((((int)*mod) + frac)*ref)/mod)/r)/div)
140 freq = d_regs->d_int;
141 freq *= d_regs->d_mod;
142 freq += d_regs->d_frac;
143 freq *= refclock_freq;
144 freq /= d_regs->d_mod;
145 freq /= d_regs->d_10_bit_r_counter;
146 freq /= (1 << d_regs->d_divider_select);