3 module setting_reg_masked
4 ( input clock, input reset, input strobe, input wire [6:0] addr,
5 input wire [31:0] in, output reg [31:0] out, output reg changed);
6 /* upper 16 bits are mask, lower 16 bits are value
7 * Note that you get a 16 bit register, not a 32 bit one */
11 always @(posedge clock)
18 if(strobe & (my_addr==addr))
20 out <= #1 (out & ~in[31:16]) | (in[15:0] & in[31:16] );
26 endmodule // setting_reg_masked