3 // USRP - Universal Software Radio Peripheral
5 // Copyright (C) 2003 Matt Ettus
7 // This program is free software; you can redistribute it and/or modify
8 // it under the terms of the GNU General Public License as published by
9 // the Free Software Foundation; either version 2 of the License, or
10 // (at your option) any later version.
12 // This program is distributed in the hope that it will be useful,
13 // but WITHOUT ANY WARRANTY; without even the implied warranty of
14 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 // GNU General Public License for more details.
17 // You should have received a copy of the GNU General Public License
18 // along with this program; if not, write to the Free Software
19 // Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
27 input wire [7:0] decim_rate,
29 input decimator_strobe,
30 input wire [31:0] freq0,
31 input wire [15:0] i_in0,
32 input wire [15:0] q_in0,
33 output wire [15:0] i_out0,
34 output wire [15:0] q_out0,
35 input wire [31:0] freq1,
36 input wire [15:0] i_in1,
37 input wire [15:0] q_in1,
38 output wire [15:0] i_out1,
39 output wire [15:0] q_out1
43 wire [15:0] bb_i, bb_q;
44 wire [15:0] i_in, q_in;
48 reg [15:0] bb_i0, bb_q0;
49 reg [15:0] bb_i1, bb_q1;
51 // We want to time-share the CORDIC by double-clocking it
53 phase_acc rx_phase_acc_0
54 (.clk(clock),.reset(reset),.enable(enable),
55 .strobe(sample_strobe),.freq(freq0),.phase(phase0) );
57 phase_acc rx_phase_acc_1
58 (.clk(clock),.reset(reset),.enable(enable),
59 .strobe(sample_strobe),.freq(freq1),.phase(phase1) );
61 assign phase = clock ? phase0[31:16] : phase1[31:16];
62 assign i_in = clock ? i_in0 : i_in1;
63 assign q_in = clock ? q_in0 : q_in1;
65 // This appears reversed because of the number of CORDIC stages
66 always @(posedge clock_2x)
79 ( .clock(clock_2x),.reset(reset),.enable(enable),
80 .xi(i_in),.yi(q_in),.zi(phase),
81 .xo(bb_i),.yo(bb_q),.zo() );
83 cic_decim cic_decim_i_0
84 ( .clock(clock),.reset(reset),.enable(enable),
85 .rate(decim_rate),.strobe_in(sample_strobe),.strobe_out(decimator_strobe),
86 .signal_in(bb_i0),.signal_out(i_out0) );
88 cic_decim cic_decim_q_0
89 ( .clock(clock),.reset(reset),.enable(enable),
90 .rate(decim_rate),.strobe_in(sample_strobe),.strobe_out(decimator_strobe),
91 .signal_in(bb_q0),.signal_out(q_out0) );
93 cic_decim cic_decim_i_1
94 ( .clock(clock),.reset(reset),.enable(enable),
95 .rate(decim_rate),.strobe_in(sample_strobe),.strobe_out(decimator_strobe),
96 .signal_in(bb_i1),.signal_out(i_out1) );
98 cic_decim cic_decim_q_1
99 ( .clock(clock),.reset(reset),.enable(enable),
100 .rate(decim_rate),.strobe_in(sample_strobe),.strobe_out(decimator_strobe),
101 .signal_in(bb_q1),.signal_out(q_out1) );
103 endmodule // rx_chain