1 // Bidirectional registers
4 ( inout wire [15:0] tristate,
6 input wire [15:0] reg_val );
8 // This would be much cleaner if all the tools
9 // supported "for generate"........
11 assign tristate[0] = oe[0] ? reg_val[0] : 1'bz;
12 assign tristate[1] = oe[1] ? reg_val[1] : 1'bz;
13 assign tristate[2] = oe[2] ? reg_val[2] : 1'bz;
14 assign tristate[3] = oe[3] ? reg_val[3] : 1'bz;
15 assign tristate[4] = oe[4] ? reg_val[4] : 1'bz;
16 assign tristate[5] = oe[5] ? reg_val[5] : 1'bz;
17 assign tristate[6] = oe[6] ? reg_val[6] : 1'bz;
18 assign tristate[7] = oe[7] ? reg_val[7] : 1'bz;
19 assign tristate[8] = oe[8] ? reg_val[8] : 1'bz;
20 assign tristate[9] = oe[9] ? reg_val[9] : 1'bz;
21 assign tristate[10] = oe[10] ? reg_val[10] : 1'bz;
22 assign tristate[11] = oe[11] ? reg_val[11] : 1'bz;
23 assign tristate[12] = oe[12] ? reg_val[12] : 1'bz;
24 assign tristate[13] = oe[13] ? reg_val[13] : 1'bz;
25 assign tristate[14] = oe[14] ? reg_val[14] : 1'bz;
26 assign tristate[15] = oe[15] ? reg_val[15] : 1'bz;
28 endmodule // bidir_reg