1 // megafunction wizard: %ALTPLL%
2 // GENERATION: STANDARD
6 // ============================================================
7 // File Name: dspclkpll.v
8 // Megafunction Name(s):
10 // ============================================================
11 // ************************************************************
12 // THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
14 // 4.0 Build 214 3/25/2004 SP 1 SJ Web Edition
15 // ************************************************************
18 //Copyright (C) 1991-2004 Altera Corporation
19 //Any megafunction design, and related netlist (encrypted or decrypted),
20 //support information, device programming or simulation file, and any other
21 //associated documentation or information provided by Altera or a partner
22 //under Altera's Megafunction Partnership Program may be used only
23 //to program PLD devices (but not masked PLD devices) from Altera. Any
24 //other use of such megafunction design, netlist, support information,
25 //device programming or simulation file, or any other related documentation
26 //or information is prohibited for any other purpose, including, but not
27 //limited to modification, reverse engineering, de-compiling, or use with
28 //any other silicon devices, unless such use is explicitly licensed under
29 //a separate agreement with Altera or a megafunction partner. Title to the
30 //intellectual property, including patents, copyrights, trademarks, trade
31 //secrets, or maskworks, embodied in any such megafunction design, netlist,
32 //support information, device programming or simulation file, or any other
33 //related documentation or information provided by Altera or a megafunction
34 //partner, remains with Altera, the megafunction partner, or their respective
35 //licensors. No other licenses, including any licenses needed under any third
36 //party's intellectual property, are provided herein.
39 // synopsys translate_off
40 `timescale 1 ps / 1 ps
41 // synopsys translate_on
52 wire [0:0] sub_wire5 = 1'h0;
53 wire [1:1] sub_wire2 = sub_wire0[1:1];
54 wire [0:0] sub_wire1 = sub_wire0[0:0];
57 wire sub_wire3 = inclk0;
58 wire [1:0] sub_wire4 = {sub_wire5, sub_wire3};
60 altpll altpll_component (
63 // synopsys translate_off
88 // synopsys translate_on
92 altpll_component.clk1_divide_by = 1,
93 altpll_component.clk1_phase_shift = "0",
94 altpll_component.clk0_duty_cycle = 50,
95 altpll_component.lpm_type = "altpll",
96 altpll_component.clk0_multiply_by = 1,
97 altpll_component.inclk0_input_frequency = 15625,
98 altpll_component.clk0_divide_by = 1,
99 altpll_component.clk1_duty_cycle = 50,
100 altpll_component.pll_type = "AUTO",
101 altpll_component.clk1_multiply_by = 2,
102 altpll_component.clk0_time_delay = "0",
103 altpll_component.intended_device_family = "Cyclone",
104 altpll_component.operation_mode = "NORMAL",
105 altpll_component.compensate_clock = "CLK0",
106 altpll_component.clk1_time_delay = "0",
107 altpll_component.clk0_phase_shift = "0";
112 // ============================================================
113 // CNX file retrieval info
114 // ============================================================
115 // Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
116 // Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
117 // Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
118 // Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
119 // Retrieval info: PRIVATE: SPREAD_USE STRING "0"
120 // Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
121 // Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
122 // Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
123 // Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
124 // Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
125 // Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
126 // Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
127 // Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
128 // Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
129 // Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
130 // Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
131 // Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
132 // Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
133 // Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
134 // Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
135 // Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
136 // Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "2"
137 // Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
138 // Retrieval info: PRIVATE: TIME_SHIFT0 STRING "0.00000000"
139 // Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
140 // Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
141 // Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0"
142 // Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
143 // Retrieval info: PRIVATE: TIME_SHIFT1 STRING "0.00000000"
144 // Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
145 // Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
146 // Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0"
147 // Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
148 // Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
149 // Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
150 // Retrieval info: PRIVATE: USE_CLK0 STRING "1"
151 // Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
152 // Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0"
153 // Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
154 // Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
155 // Retrieval info: PRIVATE: USE_CLK1 STRING "1"
156 // Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
157 // Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
158 // Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
159 // Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
160 // Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
161 // Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
162 // Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
163 // Retrieval info: PRIVATE: MEGAFN_PORT_INFO_0 STRING "inclk;fbin;pllena;clkswitch;areset"
164 // Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
165 // Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
166 // Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0"
167 // Retrieval info: PRIVATE: MEGAFN_PORT_INFO_1 STRING "pfdena;clkena;extclkena;scanclk;scanaclr"
168 // Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
169 // Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
170 // Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
171 // Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
172 // Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
173 // Retrieval info: PRIVATE: MEGAFN_PORT_INFO_2 STRING "scandata;scanread;scanwrite;clk;extclk"
174 // Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "1"
175 // Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
176 // Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
177 // Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
178 // Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "512.000"
179 // Retrieval info: PRIVATE: MEGAFN_PORT_INFO_3 STRING "clkbad;activeclock;locked;clkloss;scandataout"
180 // Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
181 // Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
182 // Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "0"
183 // Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "64.000"
184 // Retrieval info: PRIVATE: MEGAFN_PORT_INFO_4 STRING "scandone;sclkout1;sclkout0;enable0;enable1"
185 // Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
186 // Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
187 // Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.000"
188 // Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
189 // Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
190 // Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
191 // Retrieval info: PRIVATE: DEV_FAMILY STRING "Cyclone"
192 // Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "100.000"
193 // Retrieval info: PRIVATE: LOCK_LOSS_SWITCHOVER_CHECK STRING "0"
194 // Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
195 // Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "0"
196 // Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
197 // Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
198 // Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
199 // Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
200 // Retrieval info: PRIVATE: USE_CLKENA1 STRING "0"
201 // Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg"
202 // Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
203 // Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
204 // Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
205 // Retrieval info: PRIVATE: DEVICE_FAMILY NUMERIC "11"
206 // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
207 // Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "1"
208 // Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
209 // Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
210 // Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
211 // Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1"
212 // Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "15625"
213 // Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"
214 // Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
215 // Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
216 // Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "2"
217 // Retrieval info: CONSTANT: CLK0_TIME_DELAY STRING "0"
218 // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"
219 // Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
220 // Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
221 // Retrieval info: CONSTANT: CLK1_TIME_DELAY STRING "0"
222 // Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
223 // Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT VCC "c0"
224 // Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT VCC "@clk[5..0]"
225 // Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT VCC "c1"
226 // Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT GND "inclk0"
227 // Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT VCC "@extclk[3..0]"
228 // Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
229 // Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
230 // Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
231 // Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
232 // Retrieval info: GEN_FILE: TYPE_NORMAL dspclkpll.v TRUE FALSE
233 // Retrieval info: GEN_FILE: TYPE_NORMAL dspclkpll.inc FALSE FALSE
234 // Retrieval info: GEN_FILE: TYPE_NORMAL dspclkpll.cmp FALSE FALSE
235 // Retrieval info: GEN_FILE: TYPE_NORMAL dspclkpll.bsf FALSE FALSE
236 // Retrieval info: GEN_FILE: TYPE_NORMAL dspclkpll_inst.v FALSE FALSE
237 // Retrieval info: GEN_FILE: TYPE_NORMAL dspclkpll_bb.v TRUE FALSE