1 // megafunction wizard: %LPM_ADD_SUB%CBX%
2 // GENERATION: STANDARD
6 // ============================================================
7 // File Name: addsub16.v
8 // Megafunction Name(s):
10 // ============================================================
11 // ************************************************************
12 // THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
13 // ************************************************************
16 //Copyright (C) 1991-2003 Altera Corporation
17 //Any megafunction design, and related netlist (encrypted or decrypted),
18 //support information, device programming or simulation file, and any other
19 //associated documentation or information provided by Altera or a partner
20 //under Altera's Megafunction Partnership Program may be used only
21 //to program PLD devices (but not masked PLD devices) from Altera. Any
22 //other use of such megafunction design, netlist, support information,
23 //device programming or simulation file, or any other related documentation
24 //or information is prohibited for any other purpose, including, but not
25 //limited to modification, reverse engineering, de-compiling, or use with
26 //any other silicon devices, unless such use is explicitly licensed under
27 //a separate agreement with Altera or a megafunction partner. Title to the
28 //intellectual property, including patents, copyrights, trademarks, trade
29 //secrets, or maskworks, embodied in any such megafunction design, netlist,
30 //support information, device programming or simulation file, or any other
31 //related documentation or information provided by Altera or a megafunction
32 //partner, remains with Altera, the megafunction partner, or their respective
33 //licensors. No other licenses, including any licenses needed under any third
34 //party's intellectual property, are provided herein.
37 //lpm_add_sub DEVICE_FAMILY=Cyclone LPM_PIPELINE=1 LPM_WIDTH=16 aclr add_sub clken clock dataa datab result
38 //VERSION_BEGIN 3.0 cbx_lpm_add_sub 2003:04:10:18:28:42:SJ cbx_mgl 2003:06:11:11:00:44:SJ cbx_stratix 2003:05:16:10:26:50:SJ VERSION_END
40 //synthesis_resources = lut 17
41 module addsub16_add_sub_gp9
49 result) /* synthesis synthesis_clearbox=1 */;
58 wire [0:0] wire_add_sub_cella_0cout;
59 wire [0:0] wire_add_sub_cella_1cout;
60 wire [0:0] wire_add_sub_cella_2cout;
61 wire [0:0] wire_add_sub_cella_3cout;
62 wire [0:0] wire_add_sub_cella_4cout;
63 wire [0:0] wire_add_sub_cella_5cout;
64 wire [0:0] wire_add_sub_cella_6cout;
65 wire [0:0] wire_add_sub_cella_7cout;
66 wire [0:0] wire_add_sub_cella_8cout;
67 wire [0:0] wire_add_sub_cella_9cout;
68 wire [0:0] wire_add_sub_cella_10cout;
69 wire [0:0] wire_add_sub_cella_11cout;
70 wire [0:0] wire_add_sub_cella_12cout;
71 wire [0:0] wire_add_sub_cella_13cout;
72 wire [0:0] wire_add_sub_cella_14cout;
73 wire [15:0] wire_add_sub_cella_dataa;
74 wire [15:0] wire_add_sub_cella_datab;
75 wire [15:0] wire_add_sub_cella_regout;
76 wire wire_strx_lcell1_cout;
78 stratix_lcell add_sub_cella_0
81 .cin(wire_strx_lcell1_cout),
83 .cout(wire_add_sub_cella_0cout[0:0]),
84 .dataa(wire_add_sub_cella_dataa[0:0]),
85 .datab(wire_add_sub_cella_datab[0:0]),
87 .inverta((~ add_sub)),
88 .regout(wire_add_sub_cella_regout[0:0]));
90 add_sub_cella_0.cin_used = "true",
91 add_sub_cella_0.lut_mask = "96e8",
92 add_sub_cella_0.operation_mode = "arithmetic",
93 add_sub_cella_0.sum_lutc_input = "cin",
94 add_sub_cella_0.lpm_type = "stratix_lcell";
95 stratix_lcell add_sub_cella_1
98 .cin(wire_add_sub_cella_0cout[0:0]),
100 .cout(wire_add_sub_cella_1cout[0:0]),
101 .dataa(wire_add_sub_cella_dataa[1:1]),
102 .datab(wire_add_sub_cella_datab[1:1]),
104 .inverta((~ add_sub)),
105 .regout(wire_add_sub_cella_regout[1:1]));
107 add_sub_cella_1.cin_used = "true",
108 add_sub_cella_1.lut_mask = "96e8",
109 add_sub_cella_1.operation_mode = "arithmetic",
110 add_sub_cella_1.sum_lutc_input = "cin",
111 add_sub_cella_1.lpm_type = "stratix_lcell";
112 stratix_lcell add_sub_cella_2
115 .cin(wire_add_sub_cella_1cout[0:0]),
117 .cout(wire_add_sub_cella_2cout[0:0]),
118 .dataa(wire_add_sub_cella_dataa[2:2]),
119 .datab(wire_add_sub_cella_datab[2:2]),
121 .inverta((~ add_sub)),
122 .regout(wire_add_sub_cella_regout[2:2]));
124 add_sub_cella_2.cin_used = "true",
125 add_sub_cella_2.lut_mask = "96e8",
126 add_sub_cella_2.operation_mode = "arithmetic",
127 add_sub_cella_2.sum_lutc_input = "cin",
128 add_sub_cella_2.lpm_type = "stratix_lcell";
129 stratix_lcell add_sub_cella_3
132 .cin(wire_add_sub_cella_2cout[0:0]),
134 .cout(wire_add_sub_cella_3cout[0:0]),
135 .dataa(wire_add_sub_cella_dataa[3:3]),
136 .datab(wire_add_sub_cella_datab[3:3]),
138 .inverta((~ add_sub)),
139 .regout(wire_add_sub_cella_regout[3:3]));
141 add_sub_cella_3.cin_used = "true",
142 add_sub_cella_3.lut_mask = "96e8",
143 add_sub_cella_3.operation_mode = "arithmetic",
144 add_sub_cella_3.sum_lutc_input = "cin",
145 add_sub_cella_3.lpm_type = "stratix_lcell";
146 stratix_lcell add_sub_cella_4
149 .cin(wire_add_sub_cella_3cout[0:0]),
151 .cout(wire_add_sub_cella_4cout[0:0]),
152 .dataa(wire_add_sub_cella_dataa[4:4]),
153 .datab(wire_add_sub_cella_datab[4:4]),
155 .inverta((~ add_sub)),
156 .regout(wire_add_sub_cella_regout[4:4]));
158 add_sub_cella_4.cin_used = "true",
159 add_sub_cella_4.lut_mask = "96e8",
160 add_sub_cella_4.operation_mode = "arithmetic",
161 add_sub_cella_4.sum_lutc_input = "cin",
162 add_sub_cella_4.lpm_type = "stratix_lcell";
163 stratix_lcell add_sub_cella_5
166 .cin(wire_add_sub_cella_4cout[0:0]),
168 .cout(wire_add_sub_cella_5cout[0:0]),
169 .dataa(wire_add_sub_cella_dataa[5:5]),
170 .datab(wire_add_sub_cella_datab[5:5]),
172 .inverta((~ add_sub)),
173 .regout(wire_add_sub_cella_regout[5:5]));
175 add_sub_cella_5.cin_used = "true",
176 add_sub_cella_5.lut_mask = "96e8",
177 add_sub_cella_5.operation_mode = "arithmetic",
178 add_sub_cella_5.sum_lutc_input = "cin",
179 add_sub_cella_5.lpm_type = "stratix_lcell";
180 stratix_lcell add_sub_cella_6
183 .cin(wire_add_sub_cella_5cout[0:0]),
185 .cout(wire_add_sub_cella_6cout[0:0]),
186 .dataa(wire_add_sub_cella_dataa[6:6]),
187 .datab(wire_add_sub_cella_datab[6:6]),
189 .inverta((~ add_sub)),
190 .regout(wire_add_sub_cella_regout[6:6]));
192 add_sub_cella_6.cin_used = "true",
193 add_sub_cella_6.lut_mask = "96e8",
194 add_sub_cella_6.operation_mode = "arithmetic",
195 add_sub_cella_6.sum_lutc_input = "cin",
196 add_sub_cella_6.lpm_type = "stratix_lcell";
197 stratix_lcell add_sub_cella_7
200 .cin(wire_add_sub_cella_6cout[0:0]),
202 .cout(wire_add_sub_cella_7cout[0:0]),
203 .dataa(wire_add_sub_cella_dataa[7:7]),
204 .datab(wire_add_sub_cella_datab[7:7]),
206 .inverta((~ add_sub)),
207 .regout(wire_add_sub_cella_regout[7:7]));
209 add_sub_cella_7.cin_used = "true",
210 add_sub_cella_7.lut_mask = "96e8",
211 add_sub_cella_7.operation_mode = "arithmetic",
212 add_sub_cella_7.sum_lutc_input = "cin",
213 add_sub_cella_7.lpm_type = "stratix_lcell";
214 stratix_lcell add_sub_cella_8
217 .cin(wire_add_sub_cella_7cout[0:0]),
219 .cout(wire_add_sub_cella_8cout[0:0]),
220 .dataa(wire_add_sub_cella_dataa[8:8]),
221 .datab(wire_add_sub_cella_datab[8:8]),
223 .inverta((~ add_sub)),
224 .regout(wire_add_sub_cella_regout[8:8]));
226 add_sub_cella_8.cin_used = "true",
227 add_sub_cella_8.lut_mask = "96e8",
228 add_sub_cella_8.operation_mode = "arithmetic",
229 add_sub_cella_8.sum_lutc_input = "cin",
230 add_sub_cella_8.lpm_type = "stratix_lcell";
231 stratix_lcell add_sub_cella_9
234 .cin(wire_add_sub_cella_8cout[0:0]),
236 .cout(wire_add_sub_cella_9cout[0:0]),
237 .dataa(wire_add_sub_cella_dataa[9:9]),
238 .datab(wire_add_sub_cella_datab[9:9]),
240 .inverta((~ add_sub)),
241 .regout(wire_add_sub_cella_regout[9:9]));
243 add_sub_cella_9.cin_used = "true",
244 add_sub_cella_9.lut_mask = "96e8",
245 add_sub_cella_9.operation_mode = "arithmetic",
246 add_sub_cella_9.sum_lutc_input = "cin",
247 add_sub_cella_9.lpm_type = "stratix_lcell";
248 stratix_lcell add_sub_cella_10
251 .cin(wire_add_sub_cella_9cout[0:0]),
253 .cout(wire_add_sub_cella_10cout[0:0]),
254 .dataa(wire_add_sub_cella_dataa[10:10]),
255 .datab(wire_add_sub_cella_datab[10:10]),
257 .inverta((~ add_sub)),
258 .regout(wire_add_sub_cella_regout[10:10]));
260 add_sub_cella_10.cin_used = "true",
261 add_sub_cella_10.lut_mask = "96e8",
262 add_sub_cella_10.operation_mode = "arithmetic",
263 add_sub_cella_10.sum_lutc_input = "cin",
264 add_sub_cella_10.lpm_type = "stratix_lcell";
265 stratix_lcell add_sub_cella_11
268 .cin(wire_add_sub_cella_10cout[0:0]),
270 .cout(wire_add_sub_cella_11cout[0:0]),
271 .dataa(wire_add_sub_cella_dataa[11:11]),
272 .datab(wire_add_sub_cella_datab[11:11]),
274 .inverta((~ add_sub)),
275 .regout(wire_add_sub_cella_regout[11:11]));
277 add_sub_cella_11.cin_used = "true",
278 add_sub_cella_11.lut_mask = "96e8",
279 add_sub_cella_11.operation_mode = "arithmetic",
280 add_sub_cella_11.sum_lutc_input = "cin",
281 add_sub_cella_11.lpm_type = "stratix_lcell";
282 stratix_lcell add_sub_cella_12
285 .cin(wire_add_sub_cella_11cout[0:0]),
287 .cout(wire_add_sub_cella_12cout[0:0]),
288 .dataa(wire_add_sub_cella_dataa[12:12]),
289 .datab(wire_add_sub_cella_datab[12:12]),
291 .inverta((~ add_sub)),
292 .regout(wire_add_sub_cella_regout[12:12]));
294 add_sub_cella_12.cin_used = "true",
295 add_sub_cella_12.lut_mask = "96e8",
296 add_sub_cella_12.operation_mode = "arithmetic",
297 add_sub_cella_12.sum_lutc_input = "cin",
298 add_sub_cella_12.lpm_type = "stratix_lcell";
299 stratix_lcell add_sub_cella_13
302 .cin(wire_add_sub_cella_12cout[0:0]),
304 .cout(wire_add_sub_cella_13cout[0:0]),
305 .dataa(wire_add_sub_cella_dataa[13:13]),
306 .datab(wire_add_sub_cella_datab[13:13]),
308 .inverta((~ add_sub)),
309 .regout(wire_add_sub_cella_regout[13:13]));
311 add_sub_cella_13.cin_used = "true",
312 add_sub_cella_13.lut_mask = "96e8",
313 add_sub_cella_13.operation_mode = "arithmetic",
314 add_sub_cella_13.sum_lutc_input = "cin",
315 add_sub_cella_13.lpm_type = "stratix_lcell";
316 stratix_lcell add_sub_cella_14
319 .cin(wire_add_sub_cella_13cout[0:0]),
321 .cout(wire_add_sub_cella_14cout[0:0]),
322 .dataa(wire_add_sub_cella_dataa[14:14]),
323 .datab(wire_add_sub_cella_datab[14:14]),
325 .inverta((~ add_sub)),
326 .regout(wire_add_sub_cella_regout[14:14]));
328 add_sub_cella_14.cin_used = "true",
329 add_sub_cella_14.lut_mask = "96e8",
330 add_sub_cella_14.operation_mode = "arithmetic",
331 add_sub_cella_14.sum_lutc_input = "cin",
332 add_sub_cella_14.lpm_type = "stratix_lcell";
333 stratix_lcell add_sub_cella_15
336 .cin(wire_add_sub_cella_14cout[0:0]),
338 .dataa(wire_add_sub_cella_dataa[15:15]),
339 .datab(wire_add_sub_cella_datab[15:15]),
341 .inverta((~ add_sub)),
342 .regout(wire_add_sub_cella_regout[15:15]));
344 add_sub_cella_15.cin_used = "true",
345 add_sub_cella_15.lut_mask = "9696",
346 add_sub_cella_15.operation_mode = "normal",
347 add_sub_cella_15.sum_lutc_input = "cin",
348 add_sub_cella_15.lpm_type = "stratix_lcell";
350 wire_add_sub_cella_dataa = datab,
351 wire_add_sub_cella_datab = dataa;
352 stratix_lcell strx_lcell1
354 .cout(wire_strx_lcell1_cout),
357 .inverta((~ add_sub)));
359 strx_lcell1.cin_used = "false",
360 strx_lcell1.lut_mask = "00cc",
361 strx_lcell1.operation_mode = "arithmetic",
362 strx_lcell1.lpm_type = "stratix_lcell";
364 result = wire_add_sub_cella_regout;
365 endmodule //addsub16_add_sub_gp9
376 result)/* synthesis synthesis_clearbox = 1 */;
384 output [15:0] result;
386 wire [15:0] sub_wire0;
387 wire [15:0] result = sub_wire0[15:0];
389 addsub16_add_sub_gp9 addsub16_add_sub_gp9_component (
396 .result (sub_wire0));
400 // ============================================================
401 // CNX file retrieval info
402 // ============================================================
403 // Retrieval info: PRIVATE: nBit NUMERIC "16"
404 // Retrieval info: PRIVATE: Function NUMERIC "2"
405 // Retrieval info: PRIVATE: WhichConstant NUMERIC "0"
406 // Retrieval info: PRIVATE: ConstantA NUMERIC "0"
407 // Retrieval info: PRIVATE: ConstantB NUMERIC "0"
408 // Retrieval info: PRIVATE: ValidCtA NUMERIC "0"
409 // Retrieval info: PRIVATE: ValidCtB NUMERIC "0"
410 // Retrieval info: PRIVATE: CarryIn NUMERIC "0"
411 // Retrieval info: PRIVATE: CarryOut NUMERIC "0"
412 // Retrieval info: PRIVATE: Overflow NUMERIC "0"
413 // Retrieval info: PRIVATE: Latency NUMERIC "1"
414 // Retrieval info: PRIVATE: aclr NUMERIC "1"
415 // Retrieval info: PRIVATE: clken NUMERIC "1"
416 // Retrieval info: PRIVATE: LPM_PIPELINE NUMERIC "1"
417 // Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone"
418 // Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "16"
419 // Retrieval info: CONSTANT: LPM_DIRECTION STRING "UNUSED"
420 // Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_ADD_SUB"
421 // Retrieval info: CONSTANT: LPM_HINT STRING "ONE_INPUT_IS_CONSTANT=NO"
422 // Retrieval info: CONSTANT: LPM_PIPELINE NUMERIC "1"
423 // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"
424 // Retrieval info: USED_PORT: add_sub 0 0 0 0 INPUT NODEFVAL add_sub
425 // Retrieval info: USED_PORT: result 0 0 16 0 OUTPUT NODEFVAL result[15..0]
426 // Retrieval info: USED_PORT: dataa 0 0 16 0 INPUT NODEFVAL dataa[15..0]
427 // Retrieval info: USED_PORT: datab 0 0 16 0 INPUT NODEFVAL datab[15..0]
428 // Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock
429 // Retrieval info: USED_PORT: aclr 0 0 0 0 INPUT NODEFVAL aclr
430 // Retrieval info: USED_PORT: clken 0 0 0 0 INPUT NODEFVAL clken
431 // Retrieval info: CONNECT: @add_sub 0 0 0 0 add_sub 0 0 0 0
432 // Retrieval info: CONNECT: result 0 0 16 0 @result 0 0 16 0
433 // Retrieval info: CONNECT: @dataa 0 0 16 0 dataa 0 0 16 0
434 // Retrieval info: CONNECT: @datab 0 0 16 0 datab 0 0 16 0
435 // Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0
436 // Retrieval info: CONNECT: @aclr 0 0 0 0 aclr 0 0 0 0
437 // Retrieval info: CONNECT: @clken 0 0 0 0 clken 0 0 0 0
438 // Retrieval info: LIBRARY: lpm lpm.lpm_components.all