3 * Copyright 2004 Free Software Foundation, Inc.
5 * This file is part of GNU Radio
7 * GNU Radio is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
12 * GNU Radio is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with GNU Radio; see the file COPYING. If not, write to
19 * the Free Software Foundation, Inc., 51 Franklin Street,
20 * Boston, MA 02110-1301, USA.
23 #include "usrp_common.h"
24 #include "usrp_commands.h"
28 * the host side fpga loader code pushes an MD5 hash of the bitstream
31 #define USRP_HASH_SIZE 16
32 xdata at USRP_HASH_SLOT_0_ADDR unsigned char hash0[USRP_HASH_SIZE];
35 #define enable_codecs() USRP_PA &= ~(bmPA_SEN_CODEC_A | bmPA_SEN_CODEC_B)
36 #define disable_all() USRP_PA |= (bmPA_SEN_CODEC_A | bmPA_SEN_CODEC_B)
39 write_byte_msb (unsigned char v);
42 write_both_9862s (unsigned char header_lo, unsigned char v)
46 write_byte_msb (header_lo);
52 // ----------------------------------------------------------------
55 write_byte_msb (unsigned char v)
59 v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit)
66 // ----------------------------------------------------------------
68 #define REG_RX_PWR_DN 1
69 #define REG_TX_PWR_DN 8
70 #define REG_TX_MODULATOR 20
72 void eeprom_init (void)
74 unsigned short counter;
77 // configure IO ports (B and D are used by GPIF)
79 IOA = bmPORT_A_INITIAL; // Port A initial state
80 OEA = bmPORT_A_OUTPUTS; // Port A direction register
82 IOC = bmPORT_C_INITIAL; // Port C initial state
83 OEC = bmPORT_C_OUTPUTS; // Port C direction register
85 IOE = bmPORT_E_INITIAL; // Port E initial state
86 OEE = bmPORT_E_OUTPUTS; // Port E direction register
88 EP0BCH = 0; SYNCDELAY;
90 // USBCS &= ~bmRENUM; // chip firmware handles commands
91 USBCS = 0; // chip firmware handles commands
93 USRP_PC &= ~bmPC_nRESET; // active low reset
94 USRP_PC |= bmPC_nRESET;
97 bitS_OUT = 0; /* idle state has CLK = 0 */
99 write_both_9862s (REG_RX_PWR_DN, 0x01);
100 write_both_9862s (REG_TX_PWR_DN, 0x0f); // pwr dn digital and analog_both
101 write_both_9862s (REG_TX_MODULATOR, 0x00); // coarse & fine modulators disabled
103 // zero firmware hash slot
108 } while (i != USRP_HASH_SIZE);
113 if (counter & 0x8000)