2 * USRP - Universal Software Radio Peripheral
4 * Copyright (C) 2003 Free Software Foundation, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
21 #include "usrp_common.h"
22 #include "fpga_load.h"
26 * setup altera FPGA serial load (PS).
34 * ALTERA_NSTATUS = 1 (input)
37 fpga_load_begin (void)
39 USRP_ALTERA_CONFIG &= ~bmALTERA_BITS; // clear all bits (NCONFIG low)
40 udelay (40); // wait 40 us
41 USRP_ALTERA_CONFIG |= bmALTERA_NCONFIG; // set NCONFIG high
43 if (UC_BOARD_HAS_FPGA){
44 // FIXME should really cap this loop with a counter so we
45 // don't hang forever on a hardware failure.
46 while ((USRP_ALTERA_CONFIG & bmALTERA_NSTATUS) == 0) // wait for NSTATUS to go high
56 * clock out the low bit of bits.
61 * ALTERA_NSTATUS = 1 (input)
66 * ALTERA_NSTATUS = 1 (input)
73 clock_out_config_byte (unsigned char bits)
77 // clock out configuration byte, least significant bit first
79 for (i = 0; i < 8; i++){
81 USRP_ALTERA_CONFIG = ((USRP_ALTERA_CONFIG & ~bmALTERA_DATA0) | ((bits & 1) ? bmALTERA_DATA0 : 0));
82 USRP_ALTERA_CONFIG |= bmALTERA_DCLK; /* set DCLK to 1 */
83 USRP_ALTERA_CONFIG &= ~bmALTERA_DCLK; /* set DCLK to 0 */
92 clock_out_config_byte (unsigned char bits) _naked
98 mov _bitALTERA_DATA0,c
103 mov _bitALTERA_DATA0,c
108 mov _bitALTERA_DATA0,c
113 mov _bitALTERA_DATA0,c
118 mov _bitALTERA_DATA0,c
123 mov _bitALTERA_DATA0,c
128 mov _bitALTERA_DATA0,c
133 mov _bitALTERA_DATA0,c
145 clock_out_bytes (unsigned char bytecount,
146 unsigned char xdata *p)
148 while (bytecount-- > 0)
149 clock_out_config_byte (*p++);
153 * Transfer block of bytes from packet to FPGA serial configuration port
158 * ALTERA_NSTATUS = 1 (input)
163 * ALTERA_NSTATUS = 1 (input)
166 fpga_load_xfer (xdata unsigned char *p, unsigned char bytecount)
168 clock_out_bytes (bytecount, p);
173 * check for successful load...
178 unsigned char status = USRP_ALTERA_CONFIG;
180 if (!UC_BOARD_HAS_FPGA) // always true if we don't have FPGA
183 if ((status & bmALTERA_NSTATUS) == 0) // failed to program
186 if ((status & bmALTERA_CONF_DONE) == bmALTERA_CONF_DONE)
187 return 1; // everything's cool
189 // I don't think this should happen. It indicates that
190 // programming is still in progress.