1 # script for stm32f2x family
4 # stm32 devices support both JTAG and SWD transports.
6 source [find target/swj-dp.tcl]
8 if { [info exists CHIPNAME] } {
9 set _CHIPNAME $CHIPNAME
11 set _CHIPNAME stm32f2x
16 # Work-area is a space in RAM used for flash programming
18 if { [info exists WORKAREASIZE] } {
19 set _WORKAREASIZE $WORKAREASIZE
21 set _WORKAREASIZE 0x10000
24 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
26 # Since we may be running of an RC oscilator, we crank down the speed a
27 # bit more to be on the safe side. Perhaps superstition, but if are
28 # running off a crystal, we can run closer to the limit. Note
29 # that there can be a pretty wide band where things are more or less stable.
32 adapter_nsrst_delay 100
38 if { [info exists CPUTAPID] } {
39 set _CPUTAPID $CPUTAPID
42 # See STM Document RM0033
43 # Section 32.6.3 - corresponds to Cortex-M3 r2p0
44 set _CPUTAPID 0x4ba00477
46 set _CPUTAPID 0x2ba01477
50 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
52 if { [info exists BSTAPID] } {
55 # See STM Document RM0033
58 set _BSTAPID 0x06411041
62 swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
65 set _TARGETNAME $_CHIPNAME.cpu
66 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
68 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
70 set _FLASHNAME $_CHIPNAME.flash
71 flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
74 # if srst is not fitted use SYSRESETREQ to
75 # perform a soft reset
76 cortex_m reset_config sysresetreq