1 # script for stm32f0x family
4 # stm32 devices support SWD transports only.
6 source [find target/swj-dp.tcl]
8 if { [info exists CHIPNAME] } {
9 set _CHIPNAME $CHIPNAME
11 set _CHIPNAME stm32f0x
16 # Work-area is a space in RAM used for flash programming
18 if { [info exists WORKAREASIZE] } {
19 set _WORKAREASIZE $WORKAREASIZE
21 set _WORKAREASIZE 0x1000
25 if { [info exists CPUTAPID] } {
26 set _CPUTAPID $CPUTAPID
28 # See STM Document RM0091
30 set _CPUTAPID 0x0bb11477
33 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
35 set _TARGETNAME $_CHIPNAME.cpu
36 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
38 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
40 # flash size will be probed
41 set _FLASHNAME $_CHIPNAME.flash
42 flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
44 # adapter speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
47 adapter_nsrst_delay 100
49 reset_config srst_nogate
52 # if srst is not fitted use SYSRESETREQ to
53 # perform a soft reset
54 cortex_m reset_config sysresetreq