1 # SPDX-License-Identifier: GPL-2.0-or-later
4 # Silicon Laboratories SiM3x Cortex-M3
7 # SiM3x devices support both JTAG and SWD transports.
8 source [find target/swj-dp.tcl]
10 if { [info exists CHIPNAME] } {
11 set _CHIPNAME $CHIPNAME
16 if { [info exists CPUTAPID] } {
17 set _CPUTAPID $CPUTAPID
19 set _CPUTAPID 0x4ba00477
22 if { [info exists CPURAMSIZE] } {
23 set _CPURAMSIZE $CPURAMSIZE
25 # Minimum size of RAM in the Silicon Labs product matrix (8KB)
26 set _CPURAMSIZE 0x2000
29 if { [info exists CPUROMSIZE] } {
30 set _CPUROMSIZE $CPUROMSIZE
32 # Minimum size of FLASH in the Silicon Labs product matrix (32KB)
33 set _CPUROMSIZE 0x8000
36 if { [info exists WORKAREASIZE] } {
37 set _WORKAREASIZE $WORKAREASIZE
39 set _WORKAREASIZE $_CPURAMSIZE
42 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
43 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
45 set _TARGETNAME $_CHIPNAME.cpu
46 target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
48 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
50 set _FLASHNAME $_CHIPNAME.flash
51 flash bank $_FLASHNAME sim3x 0 $_CPUROMSIZE 0 0 $_TARGETNAME
55 adapter srst delay 100