1 # SPDX-License-Identifier: GPL-2.0-or-later
3 # script for Nuvoton MuMicro Cortex-M0 Series
5 # Adapt based on what transport is active.
6 source [find target/swj-dp.tcl]
9 if { [info exists CHIPNAME] } {
10 set _CHIPNAME $CHIPNAME
15 # SWD DP-ID Nuvoton NuMicro Cortex-M0 has SWD Transport only.
16 if { [info exists CPUDAPID] } {
17 set _CPUDAPID $CPUDAPID
19 set _CPUDAPID 0x0BB11477
22 # Work-area is a space in RAM used for flash programming
24 if { [info exists WORKAREASIZE] } {
25 set _WORKAREASIZE $WORKAREASIZE
27 set _WORKAREASIZE 0x800
31 # Debug Adapter Target Settings
32 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUDAPID
33 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
34 set _TARGETNAME $_CHIPNAME.cpu
35 target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
37 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
39 # flash bank <name> numicro <base> <size(autodetect,set to 0)> 0 0 <target#>
40 #set _FLASHNAME $_CHIPNAME.flash
41 #flash bank $_FLASHNAME numicro 0 $_FLASHSIZE 0 0 $_TARGETNAME
42 # flash size will be probed
43 set _FLASHNAME $_CHIPNAME.flash_aprom
44 flash bank $_FLASHNAME numicro 0x00000000 0 0 0 $_TARGETNAME
45 set _FLASHNAME $_CHIPNAME.flash_data
46 flash bank $_FLASHNAME numicro 0x0001F000 0 0 0 $_TARGETNAME
47 set _FLASHNAME $_CHIPNAME.flash_ldrom
48 flash bank $_FLASHNAME numicro 0x00100000 0 0 0 $_TARGETNAME
49 set _FLASHNAME $_CHIPNAME.flash_config
50 flash bank $_FLASHNAME numicro 0x00300000 0 0 0 $_TARGETNAME
52 # set default SWCLK frequency
55 # set default srst setting "none"
58 # HLA doesn't have cortex_m commands
60 # if srst is not fitted use SYSRESETREQ to
61 # perform a soft reset
62 cortex_m reset_config sysresetreq