target/cortex_m: use cortex_m->dcb_dhcsr in cortex_m_soft_reset_halt()
[fw/openocd] / tcl / target / nhs31xx.cfg
1 # NXP NHS31xx Cortex-M0+ with 8kB SRAM
2
3 set CHIPNAME nhs31xx
4 source [find target/lpc8nxx.cfg]