1 # SPDX-License-Identifier: GPL-2.0-or-later
3 ######################################
5 ######################################
7 if { [info exists CHIPNAME] } {
8 set _CHIPNAME $CHIPNAME
13 if { [info exists ENDIAN] } {
20 if { [info exists CPUTAPID] } {
21 set _CPUTAPID $CPUTAPID
23 set _CPUTAPID 0x07926f0f
27 # Wired to separate STDO pin on the lpc3131, externally muxed to TDO on ea3131 module
28 # JTAGSEL pin must be 0 to activate, which reassigns arm tdo to a pass through.
29 if { [info exists SJCTAPID] } {
30 set _SJCTAPID $SJCTAPID
32 set _SJCTAPID 0x1541E02B
35 jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
37 ##################################################################
38 # various symbol definitions, to avoid hard-wiring addresses
39 ##################################################################
42 set lpc313x [ dict create ]
44 # Physical addresses for controllers and memory
45 dict set lpc313x sram0 0x11028000
46 dict set lpc313x sram1 0x11040000
47 dict set lpc313x uart 0x15001000
48 dict set lpc313x cgu 0x13004000
49 dict set lpc313x ioconfig 0x13003000
50 dict set lpc313x sysconfig 0x13002800
51 dict set lpc313x wdt 0x13002400
53 ##################################################################
54 # Target configuration
55 ##################################################################
57 adapter srst delay 1000
60 set _TARGETNAME $_CHIPNAME.cpu
61 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
63 $_TARGETNAME invoke-event halted
65 $_TARGETNAME configure -work-area-phys [dict get $lpc313x sram0] -work-area-size 0x30000 -work-area-backup 0
67 $_TARGETNAME configure -event reset-init {
68 echo "\nRunning reset init script for LPC3131\n"
71 reg cpsr 0xa00000d3 ;#Supervisor mode
77 arm7_9 fast_memory_access enable
78 arm7_9 dcc_downloads enable