2 # NXP i.MX7ULP: Cortex-A7 + Cortex-M4
5 if { [info exists CHIPNAME] } {
6 set _CHIPNAME $CHIPNAME
11 # CoreSight Debug Access Port
12 if { [info exists DAP_TAPID] } {
13 set _DAP_TAPID $DAP_TAPID
15 # TAPID is from FreeScale!
16 set _DAP_TAPID 0x188e101d
19 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
20 -expected-id $_DAP_TAPID
22 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
25 target create $_CHIPNAME.cpu_a7 cortex_a -dap $_CHIPNAME.dap \
26 -coreid 0 -dbgbase 0x80030000
29 # Boots by default so don't defer examination
30 target create $_CHIPNAME.cpu_m4 cortex_m -dap $_CHIPNAME.dap -ap-num 3
33 target create $_CHIPNAME.ahb mem_ap -dap $_CHIPNAME.dap -ap-num 0
35 # Default is Cortex-A7
36 targets $_CHIPNAME.cpu_a7