git.gag.com Git - fw/openocd/blob - tcl/target/gd32vf103.cfg

   1 #
   2 # GigaDevice GD32VF103 target
   3 #
   4 # https://www.gigadevice.com/products/microcontrollers/gd32/risc-v/
   5 #
   6
   7 transport select jtag
   8
   9 if { [info exists CHIPNAME] } {
  10    set _CHIPNAME $CHIPNAME
  11 } else {
  12    set _CHIPNAME gd32vf103
  13 }
  14
  15 if { [info exists WORKAREASIZE] } {
  16    set _WORKAREASIZE $WORKAREASIZE
  17 } else {
  18    set _WORKAREASIZE 0x800
  19 }
  20
  21 jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563d
  22
  23 set _TARGETNAME $_CHIPNAME.cpu
  24 target create $_TARGETNAME riscv -chain-position $_TARGETNAME
  25
  26 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0