1 # SPDX-License-Identifier: GPL-2.0-or-later
4 # Silicon Labs (formerly Energy Micro) EFM32 target
6 # Note: All EFM32 chips have SWD support, but only newer series 1
7 # chips have JTAG support.
10 source [find target/swj-dp.tcl]
12 if { [info exists CHIPNAME] } {
13 set _CHIPNAME $CHIPNAME
18 # Work-area is a space in RAM used for flash programming
20 if { [info exists WORKAREASIZE] } {
21 set _WORKAREASIZE $WORKAREASIZE
23 set _WORKAREASIZE 0x800
26 if { [info exists CPUTAPID] } {
27 set _CPUTAPID $CPUTAPID
30 set _CPUTAPID 0x4ba00477
32 set _CPUTAPID 0x2ba01477
36 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
37 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
41 set _TARGETNAME $_CHIPNAME.cpu
42 target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
44 $_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
46 set _FLASHNAME $_CHIPNAME.flash
47 flash bank $_FLASHNAME efm32 0 0 0 0 $_TARGETNAME
48 flash bank userdata.flash efm32 0x0FE00000 0 0 0 $_TARGETNAME
49 flash bank lockbits.flash efm32 0x0FE04000 0 0 0 $_TARGETNAME
52 # if srst is not fitted use SYSRESETREQ to
53 # perform a soft reset
54 cortex_m reset_config sysresetreq