1 # SPDX-License-Identifier: GPL-2.0-or-later
3 if { [info exists CHIPNAME] } {
4 set _CHIPNAME $CHIPNAME
9 if { [info exists ENDIAN] } {
12 # This config file was defaulting to big endian..
16 if { [info exists CPUTAPID] } {
17 set _CPUTAPID $CPUTAPID
19 set _CPUTAPID 0x3f0f0f0f
22 adapter srst delay 200
26 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
27 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
30 ## Target configuration
32 set _TARGETNAME $_CHIPNAME.cpu
33 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
35 # allocate the entire SRAM as working area
36 $_TARGETNAME configure -work-area-phys 0x10000 -work-area-size 0x2000
38 ## flash configuration
39 # only target number is needed
40 set _FLASHNAME $_CHIPNAME.flash
41 flash bank $_FLASHNAME aduc702x 0 0 0 0 $_TARGETNAME
43 ## If you use the watchdog, the following code makes sure that the board
44 ## doesn't reboot when halted via JTAG. Yes, on the older generation
45 ## AdUC702x, timer3 continues running even when the CPU is halted.
47 proc watchdog_service {} {
51 set watchdog_hdl [after 500 watchdog_service]
54 $_TARGETNAME configure -event reset-halt-post { watchdog_service }
55 $_TARGETNAME configure -event resume-start { global watchdog_hdl; after cancel $watchdog_hdl }