1 # SPDX-License-Identifier: GPL-2.0-or-later
3 set AT91_RSTC_CR [expr {$AT91_RSTC + 0x00}] ;# Reset Controller Control Register
4 set AT91_RSTC_PROCRST [expr {1 << 0}] ;# Processor Reset
5 set AT91_RSTC_PERRST [expr {1 << 2}] ;# Peripheral Reset
6 set AT91_RSTC_EXTRST [expr {1 << 3}] ;# External Reset
7 set AT91_RSTC_KEY [expr {0xa5 << 24}] ;# KEY Password
9 set AT91_RSTC_SR [expr {$AT91_RSTC + 0x04}] ;# Reset Controller Status Register
10 set AT91_RSTC_URSTS [expr {1 << 0}] ;# User Reset Status
11 set AT91_RSTC_RSTTYP [expr {7 << 8}] ;# Reset Type
12 set AT91_RSTC_RSTTYP_GENERAL [expr {0 << 8}]
13 set AT91_RSTC_RSTTYP_WAKEUP [expr {1 << 8}]
14 set AT91_RSTC_RSTTYP_WATCHDOG [expr {2 << 8}]
15 set AT91_RSTC_RSTTYP_SOFTWARE [expr {3 << 8}]
16 set AT91_RSTC_RSTTYP_USER [expr {4 << 8}]
17 set AT91_RSTC_NRSTL [expr {1 << 16}] ;# NRST Pin Level
18 set AT91_RSTC_SRCMP [expr {1 << 17}] ;# Software Reset Command in Progress
20 set AT91_RSTC_MR [expr {$AT91_RSTC + 0x08}] ;# Reset Controller Mode Register
21 set AT91_RSTC_URSTEN [expr {1 << 0}] ;# User Reset Enable
22 set AT91_RSTC_URSTIEN [expr {1 << 4}] ;# User Reset Interrupt Enable
23 set AT91_RSTC_ERSTL [expr {0xf << 8}] ;# External Reset Length