2 #ft2232_device_desc "BeagleBone A"
4 ft2232_vid_pid 0x0403 0xa6d0
9 if { [info exists CHIPNAME] } {
10 set _CHIPNAME $CHIPNAME
15 proc icepick_d_tapenable {jrc port} {
17 irscan $jrc 7 -endstate IRPAUSE
18 drscan $jrc 8 0x89 -endstate DRPAUSE
21 irscan $jrc 2 -endstate IRPAUSE
22 drscan $jrc 32 [expr 0xa0002108 + ($port << 24)] -endstate DRPAUSE
25 irscan $jrc 2 -endstate IRPAUSE
26 drscan $jrc 32 0xe0002008 -endstate DRPAUSE
28 irscan $jrc 0x3F -endstate RUN/IDLE
35 if { [info exists M3_DAP_TAPID] } {
36 set _M3_DAP_TAPID $M3_DAP_TAPID
38 set _M3_DAP_TAPID 0x4b6b902f
40 jtag newtap $_CHIPNAME m3_dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable
41 jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11"
46 if { [info exists DAP_TAPID ] } {
47 set _DAP_TAPID $DAP_TAPID
49 set _DAP_TAPID 0x4b6b902f
51 jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
52 jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12"
55 # ICEpick-D (JTAG route controller)
57 if { [info exists JRC_TAPID ] } {
58 set _JRC_TAPID $JRC_TAPID
60 set _JRC_TAPID 0x0b94402f
62 jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID
63 jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
64 # some TCK tycles are required to activate the DEBUG power domain
65 jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
70 set _TARGETNAME $_CHIPNAME.cpu
71 target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.dap -dbgbase 0x80001000
73 # SRAM: 64K at 0x4030.0000; use the first 16K
74 $_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x4000
76 $_TARGETNAME configure -event reset-assert "am335x_dbginit $_TARGETNAME"
77 $_TARGETNAME configure -event reset-assert-post "am335x_dbginit $_TARGETNAME"
79 $_TARGETNAME configure -event gdb-attach {
81 am335x_dbginit $_TARGETNAME
86 # Run this to enable invasive debugging. This is run automatically in the
88 proc am335x_dbginit {target} {
89 # General Cortex A8 debug initialisation