1 # SPDX-License-Identifier: GPL-2.0-or-later
3 # Configuration for the ST SPEAr310 Evaluation board
4 # EVALSPEAr310 Rev. 2.0, modified to enable SRST on JTAG connector
5 # http://www.st.com/spear
7 # List of board modifications to enable SRST, as reported in
8 # ST Application Note AN3321.
9 # - Modifications on the top layer:
10 # 1. remove R137 and C57, located near the SMII PHY U18;
11 # 2. remove R172 and C75, located near the SMII PHY U19;
12 # 3. remove R207 and C90, located near the SMII PHY U20;
13 # 4. remove C236, located near the SMII PHY U21;
14 # 5. remove U12, located near the JTAG connector;
15 # 6. solder together pins 7, 8 and 9 of U12;
16 # 7. solder together pins 11, 12, 13, 14, 15, 16, 17 and 18 of U12.
17 # - Modifications on the bottom layer:
18 # 8. replace reset chip U11 with a STM6315SDW13F;
19 # 9. add 0 ohm resistor R329. It is located close to JTAG connector.
22 # Author: Antonio Borneo <borneo.antonio@gmail.com>
25 # Modified boards has SRST on JTAG connector
27 source [find board/spear310evb20.cfg]