1 # SPDX-License-Identifier: GPL-2.0-or-later
3 #-------------------------------------------------------------------------
4 # Mini2440 Samsung s3c2440A Processor with 64MB DRAM, 64MB NAND, 2 MB N0R
5 # NOTE: Configured for NAND boot (switch S2 in NANDBOOT)
6 # 64 MB NAND (Samsung K9D1208V0M)
9 # ----------- Important notes to help you on your way ----------
11 # NOR/NAND Boot Switch - I have not read the vivi source, but from
12 # what I could tell from reading the registers it appears that vivi
13 # loads itself into DRAM and then flips NFCONT (0x4E000004) bits
14 # Mode (bit 0 = 1), and REG_nCE (bit 1 = 0) which maps the NAND
15 # FLASH at the bottom 64MB of memory. This essentially takes the
16 # NOR Flash out of the circuit so you can't trash it.
18 # I adapted the samsung_s3c2440.cfg file which is why I did not
19 # include "source [find target/samsung_s3c2440.cfg]". I believe
20 # the -work-area-phys 0x200000 is incorrect, but also had to pad
21 # some additional resets. I didn't modify it as if it is working
22 # for someone, the work-area-phys is not used by most.
24 # JTAG ADAPTER SPECIFIC
25 # IMPORTANT! Any JTAG device that uses ADAPTIVE CLOCKING will likely
26 # FAIL as the pin RTCK on the mini2440 10 pin JTAG Conn doesn't exist.
27 # This is Pin 11 (RTCK) on 20 pin JTAG connector. Therefore it is
28 # necessary to FORCE setting the clock. Normally this should be configured
29 # in the openocd.cfg file, but was placed here as it can be a tough
30 # problem to figure out. THIS MAY NOT FIX YOUR PROBLEM.. I modified
31 # the openOCD driver jlink.c and posted it here. It may eventually end
32 # up changed in openOCD, but its a hack in the driver and really should
33 # be in the jtag layer (core.c me thinks), but haven't done it yet. My
34 # hack for jlink.c may be found here.
36 # http://forum.sparkfun.com/viewtopic.php?t=16763&sid=946e65abdd3bab39cc7d90dee33ff135
38 # Note: Also if you have a USB JTAG, you will need the USB library installed
39 # on your system "libusb-dev" or the make of openocd will fail. I *think*
40 # it's apt-get install libusb-dev. When I made my config I only included
41 # --enable-jlink and --enable-usbdevs
43 # I HAVE NOT Tested this thoroughly, so there could still be problems.
44 # But it should get you way ahead of the game from where I started.
45 # If you find problems (and fixes) please post them to
46 # openocd-development@lists.berlios.de and join the developers and
47 # check in fixes to this and anything else you find. I do not
48 # provide support, but if you ask really nice and I see anything
49 # obvious I will tell you.. mostly just dig, fix, and submit to openocd.
51 # best! brfindla@yahoo.com Nashua, NH USA
53 # Recommended resources:
54 # - first two are the best Mini2440 resources anywhere
55 # - maintained by buserror... thanks guy!
57 # http://bliterness.blogspot.com/
58 # http://code.google.com/p/mini2440/
62 # http://forum.sparkfun.com/viewforum.php?f=18
63 # http://labs.kernelconcepts.de/Publications/Micro24401/
64 # http://www.friendlyarm.net/home
65 # http://www.amontec.com/jtag_pinout.shtml
67 #-------------------------------------------------------------------------
70 # Your openocd.cfg file should contain:
71 # source [find interface/<yourjtag>.cfg]
72 # source [find board/mini2440.cfg]
77 # FIXME use some standard target config, maybe create one from this
79 # source [find target/...cfg]
81 #-------------------------------------------------------------------------
82 # Target configuration for the Samsung 2440 system on chip
83 # Tested on a S3C2440 Evaluation board by keesj
84 # Processor : ARM920Tid(wb) rev 0 (v4l)
85 # Info: JTAG tap: s3c2440.cpu tap/device found: 0x0032409d
86 # (Manufacturer: 0x04e, Part: 0x0324, Version: 0x0)
87 #-------------------------------------------------------------------------
89 if { [info exists CHIPNAME] } {
90 set _CHIPNAME $CHIPNAME
95 if { [info exists ENDIAN] } {
98 # this defaults to a bigendian
102 if { [info exists CPUTAPID] } {
103 set _CPUTAPID $CPUTAPID
105 set _CPUTAPID 0x0032409d
109 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
111 set _TARGETNAME $_CHIPNAME.cpu
112 target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
113 $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 1
116 adapter srst delay 100
118 reset_config trst_and_srst
120 #-------------------------------------------------------------------------
121 # JTAG ADAPTER SPECIFIC
122 # IMPORTANT! See README at top of this file.
123 #-------------------------------------------------------------------------
128 #-------------------------------------------------------------------------
130 #-------------------------------------------------------------------------
132 gdb_breakpoint_override hard
134 #------------------------------------------------
136 #------------------------------------------------
139 # arm7_9 dcc_downloads enable
140 # arm7_9 fast_memory_access enable
143 nand device s3c2440 0
145 adapter srst delay 100
147 reset_config trst_and_srst
151 echo "-------------------------------------------"
152 echo "--- login with - telnet localhost 4444 ---"
153 echo "--- then type help_2440 ---"
154 echo "-------------------------------------------"
159 #------------------------------------------------
160 # Processor Initialialization
161 # Note: Processor writes can only occur when
162 # the state is in SYSTEM. When you call init_2440
163 # one of the first lines will tell you what state
164 # you are in. If a linux image is booting
165 # when you run this, it will not work
166 # a vivi boot loader will run with this just
167 # fine. The reg values were obtained by a combination
168 # of figuring them out fromt the manual, and looking
169 # at post vivi values with the debugger. Don't
170 # place too much faith in them, but seem to work.
171 #------------------------------------------------
178 #-----------------------------------------------
179 # Set Processor Clocks - mini2440 xtal=12mHz
180 # we set main clock for 405mHZ
181 # we set the USB Clock for 48mHz
182 # OM2 OM3 pulled to ground so main clock and
183 # usb clock are off 12mHz xtal
184 #-----------------------------------------------
186 mww phys 0x4C000014 0x00000005 ;# Clock Divider control Reg
187 mww phys 0x4C000000 0xFFFFFFFF ;# LOCKTIME count register
188 mww phys 0x4C000008 0x00038022 ;# UPPLCON USB clock config Reg
189 mww phys 0x4C000004 0x0007F021 ;# MPPLCON Proc clock config Reg
191 #-----------------------------------------------
192 # Configure Memory controller
193 # BWSCON configures all banks, NAND, NOR, DRAM
194 # DRAM - 64MB - 32 bit bus, uses BANKCON6 BANKCON7
195 #-----------------------------------------------
197 mww phys 0x48000000 0x22111112 ;# BWSCON - Bank and Bus Width
198 mww phys 0x48000010 0x00001112 ;# BANKCON4 - ?
199 mww phys 0x4800001c 0x00018009 ;# BANKCON6 - DRAM
200 mww phys 0x48000020 0x00018009 ;# BANKCON7 - DRAM
201 mww phys 0x48000024 0x008E04EB ;# REFRESH - DRAM
202 mww phys 0x48000028 0x000000B2 ;# BANKSIZE - DRAM
203 mww phys 0x4800002C 0x00000030 ;# MRSRB6 - DRAM
204 mww phys 0x48000030 0x00000030 ;# MRSRB7 - DRAM
206 #-----------------------------------------------
207 # Now port configuration for enables for memory
209 #-----------------------------------------------
211 mww phys 0x56000000 0x007FFFFF ;# GPACON
213 mww phys 0x56000010 0x00295559 ;# GPBCON
214 mww phys 0x56000018 0x000003FF ;# GPBUP (PULLUP ENABLE)
215 mww phys 0x56000014 0x000007C2 ;# GPBDAT
217 mww phys 0x56000020 0xAAAAA6AA ;# GPCCON
218 mww phys 0x56000028 0x0000FFFF ;# GPCUP
219 mww phys 0x56000024 0x00000020 ;# GPCDAT
221 mww phys 0x56000030 0xAAAAAAAA ;# GPDCON
222 mww phys 0x56000038 0x0000FFFF ;# GPDUP
224 mww phys 0x56000040 0xAAAAAAAA ;# GPECON
225 mww phys 0x56000048 0x0000FFFF ;# GPEUP
227 mww phys 0x56000050 0x00001555 ;# GPFCON
228 mww phys 0x56000058 0x0000007F ;# GPFUP
229 mww phys 0x56000054 0x00000000 ;# GPFDAT
231 mww phys 0x56000060 0x00150114 ;# GPGCON
232 mww phys 0x56000068 0x0000007F ;# GPGUP
234 mww phys 0x56000070 0x0015AAAA ;# GPHCON
235 mww phys 0x56000078 0x000003FF ;# GPGUP
241 proc flash_config { } {
243 #-----------------------------------------
244 # Finish Flash Configuration
245 #-----------------------------------------
249 #flash configuration (K9D1208V0M: 512Mbit, x8, 3.3V, Mode: Normal, 1st gen)
254 proc flash_uboot { } {
256 # flash the u-Boot binary and reboot into it
259 nand erase 0 0x0 0x40000
260 nand write 0 /tftpboot/u-boot-nand512.bin 0 oob_softecc_kw
265 proc load_uboot { } {
268 echo "----------------------------------------------------------"
269 echo "---- Load U-Boot into RAM and execute it. ---"
270 echo "---- NOTE: loads, partially runs, and hangs ---"
271 echo "---- U-Boot is fine, this image runs from vivi. ---"
272 echo "---- I burned u-boot into NAND so I didn't finish ---"
273 echo "---- debugging it. I am leaving this here as it is ---"
274 echo "---- part of the way there if you want to fix it. ---"
276 echo "---- mini2440 U-boot here: ---"
277 echo "---- http://repo.or.cz/w/u-boot-openmoko/mini2440.git ---"
278 echo "---- Also this: ---"
279 echo "---- http://code.google.com/p/mini2440/wiki/MiniBringup --"
280 echo "----------------------------------------------------------"
283 echo "Loading /tftpboot/u-boot-nand512.bin"
284 load_image /tftpboot/u-boot-nand512.bin 0x33f80000 bin
285 echo "Verifying image...."
286 verify_image /tftpboot/u-boot-nand512.bin 0x33f80000 bin
287 echo "jumping to u-boot"
297 # this may help a little bit debugging the load_uboot
301 arm disassemble 0x33F80068 0x10
307 echo "-----------------------------------------------------------"
308 echo "---- The following mini2440 funcs are supported ----"
309 echo "---- init_2440 - initialize clocks, DRAM, IO ----"
310 echo "---- flash_config - configures nand flash ----"
311 echo "---- load_uboot - loads uboot into ram ----"
312 echo "---- flash_uboot - flashes uboot to nand (untested) ----"
313 echo "---- help_2440 - this help display ----"
314 echo "-----------------------------------------------------------"
320 #----------------------------------------------------------------------------
321 #----------------------------------- END ------------------------------------
322 #----------------------------------------------------------------------------