1 # SPDX-License-Identifier: GPL-2.0-or-later
4 # Copyright 2010 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 # This is for the "at91rm9200-ek" eval board.
11 # It has atmel at91rm9200 chip.
12 source [find target/at91rm9200.cfg]
14 reset_config trst_and_srst
16 $_TARGETNAME configure -event gdb-attach { reset init }
17 $_TARGETNAME configure -event reset-init { at91rm9200_ek_init }
19 ## flash bank <name> <driver> <base> <size> <chip_width> <bus_width> <target>
20 set _FLASHNAME $_CHIPNAME.flash
21 flash bank $_FLASHNAME cfi 0x10000000 0x00800000 2 2 $_TARGETNAME
23 # The chip may run @ 32khz, so set a really low JTAG speed
26 proc at91rm9200_ek_init { } {
27 # Try to run at 1khz... Yea, that slow!
28 # Chip is really running @ 32khz
31 mww 0xfffffc64 0xffffffff
32 ## disable all clocks but system clock
33 mww 0xfffffc04 0xfffffffe
34 ## disable all clocks to pioa and piob
35 mww 0xfffffc14 0xffffffc3
36 ## master clock = slow cpu = slow
37 ## (means the CPU is running at 32khz!)
40 mww 0xfffffc20 0x0000ff01
42 mww 0xFFFFFF50 0x00000000
43 ## MC_PUER: Memory controller protection unit disable
44 mww 0xFFFFFF54 0x00000000
46 mww 0xFFFFFF64 0x00000000
47 ## SMC2_CSR[0]: 16bit, 2 TDF, 4 WS
48 mww 0xFFFFFF70 0x00003284
52 mww 0xFFFFFC28 0x2000BF05
53 ## PLLAR: 179,712000 MHz for PCK
54 mww 0xFFFFFC28 0x20263E04
57 mww 0xFFFFFC30 0x00000100
59 ## ;MCKR : PCK/3 = MCK Master Clock = 59,904000MHz from PLLA
60 mww 0xFFFFFC30 0x00000202
63 #========================================
64 # CPU now runs at 180mhz
67 #========================================
70 ## PIOC_ASR: Configure PIOC as peripheral (D16/D31)
71 mww 0xFFFFF870 0xFFFF0000
73 mww 0xFFFFF874 0x00000000
75 mww 0xFFFFF804 0xFFFF0000
76 ## EBI_CSA : CS1=SDRAM
77 mww 0xFFFFFF60 0x00000002
79 mww 0xFFFFFF64 0x00000000
81 mww 0xFFFFFF98 0x2188c155
82 ## SDRC_MR : Precharge All
83 mww 0xFFFFFF90 0x00000002
85 mww 0x20000000 0x00000000
87 mww 0xFFFFFF90 0x00000004
89 mww 0x20000000 0x00000000
91 mww 0x20000000 0x00000000
93 mww 0x20000000 0x00000000
95 mww 0x20000000 0x00000000
97 mww 0x20000000 0x00000000
99 mww 0x20000000 0x00000000
101 mww 0x20000000 0x00000000
103 mww 0x20000000 0x00000000
104 ## SDRC_MR : Load Mode Register
105 mww 0xFFFFFF90 0x00000003
107 mww 0x20000080 0x00000000
108 ## SDRC_TR : Write refresh rate
109 mww 0xFFFFFF94 0x000002E0
111 mww 0x20000000 0x00000000
112 ## SDRC_MR : Normal Mode
113 mww 0xFFFFFF90 0x00000000
115 mww 0x20000000 0x00000000