2 T -6400 -2200 8 10 0 0 0 0 1
3 description=STM32F042G6U
4 T -6400 -1300 8 10 0 0 0 0 1
6 T -6400 -1600 8 10 0 0 0 0 1
8 T -6400 -1000 8 10 0 0 0 0 1
10 B 300 300 9600 11000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
11 T 7300 10500 8 10 1 1 0 0 1
13 P 10200 6000 9900 6000 1 0 0
15 T 10100 6000 5 10 0 0 0 0 1
17 T 9845 5995 5 10 1 1 0 6 1
18 pinlabel=PA6/SPI1_MISO/I2S1_MCK/TIM3_CH1/TIM1_BKIN/TIM16_CH1/TSC_G2_IO3/EVENTOUT/ADC_IN6
19 T 9995 6045 5 10 1 1 0 0 1
21 T 10100 6000 5 10 0 0 0 0 1
24 P 10200 5400 9900 5400 1 0 0
26 T 10100 5400 5 10 0 0 0 0 1
28 T 9845 5395 5 10 1 1 0 6 1
29 pinlabel=PA7/SPI1_MOSI/I2S1_SD/TIM3_CH2/TIM14_CH1/TIM1_CH1N/TIM17_CH1/TSC_G2_IO4/EVENTOUT/ADC_IN7
30 T 9995 5445 5 10 1 1 0 0 1
32 T 10100 5400 5 10 0 0 0 0 1
35 P 10200 4200 9900 4200 1 0 0
37 T 10200 4200 5 10 0 0 0 0 1
39 T 9845 4195 5 10 1 1 0 6 1
40 pinlabel=PA9/USART1_TX/TIM1_CH2/TSC_G4_IO1/I2C1_SCL/PA11/CAN_RX/USART1_CTS/TIM1_CH4/COMP1_OUT/TSC_G4_IO3/EVENTOUT/I2C1_SCL/USB_DM
41 T 9995 4245 5 10 1 1 0 0 1
43 T 10200 4200 5 10 0 0 0 0 1
46 P 10200 3600 9900 3600 1 0 0
48 T 10200 3600 5 10 0 0 0 0 1
50 T 9845 3595 5 10 1 1 0 6 1
51 pinlabel=PA10/USART1_RX/TIM1_CH3/TIM17_BKIN/TSC_G4_IO2/I2C1_SDA/PA12/CAN_TX/USART1_RTS/TIM1_ETR/TSC_G4_IO4/EVENTOUT/I2C1_SDA/USB_DP
52 T 9995 3645 5 10 1 1 0 0 1
54 T 10200 3600 5 10 0 0 0 0 1
57 P 10200 1900 9900 1900 1 0 0
59 T 10200 1900 5 10 0 0 0 0 1
61 T 9845 1895 5 10 1 1 0 6 1
62 pinlabel=PA13/IR_OUT/SWDIO/USB_NOE
63 T 9995 1945 5 10 1 1 0 0 1
65 T 10200 1900 5 10 0 0 0 0 1
68 P 10200 1300 9900 1300 1 0 0
70 T 10200 1300 5 10 0 0 0 0 1
72 T 9845 1295 5 10 1 1 0 6 1
73 pinlabel=PA14/USART2_TX/SWCLK
74 T 9995 1345 5 10 1 1 0 0 1
76 T 10200 1300 5 10 0 0 0 0 1
79 P 10200 700 9900 700 1 0 0
81 T 10200 700 5 10 0 0 0 0 1
83 T 9845 695 5 10 1 1 0 6 1
84 pinlabel=PA15/SPI1_NSS/I2S1_WS/USART2_RX/TIM2_CH1_ETR/EVENTOUT/USB_NOE
85 T 9995 745 5 10 1 1 0 0 1
87 T 10200 700 5 10 0 0 0 0 1
90 P 10200 6600 9900 6600 1 0 0
92 T 10200 6600 5 10 0 0 0 0 1
94 T 9845 6595 5 10 1 1 0 6 1
95 pinlabel=PA5/SPI1_SCK/I2S1_CK/CEC/TIM2_CH1_ETR/TSC_G2_IO2/ADC_IN5
96 T 9995 6645 5 10 1 1 0 0 1
98 T 10200 6600 5 10 0 0 0 0 1
101 P 10200 7200 9900 7200 1 0 0
103 T 10200 7200 5 10 0 0 0 0 1
105 T 9845 7195 5 10 1 1 0 6 1
106 pinlabel=PA4/SPI1_NSS/I2S1_WS/TIM14_CH1/TSC_G2_IO1/USART2_CK/USB_NOE/ADC_IN4
107 T 9995 7245 5 10 1 1 0 0 1
109 T 10200 7200 5 10 0 0 0 0 1
112 P 10200 9600 9900 9600 1 0 0
114 T 10200 9600 5 10 0 0 0 0 1
116 T 9845 9595 5 10 1 1 0 6 1
117 pinlabel=PA0/USART2_CTS/TIM2_CH1_ETR/TSC_G1_IO1/RTC_TAMP2/WKUP1/ADC_IN0
118 T 9995 9645 5 10 1 1 0 0 1
120 T 10200 9600 5 10 0 0 0 0 1
123 P 10200 7800 9900 7800 1 0 0
125 T 10200 7800 5 10 0 0 0 0 1
127 T 9845 7795 5 10 1 1 0 6 1
128 pinlabel=PA3/USART2_RX/TIM2_CH4/TSC_G1_IO4/ADC_IN3
129 T 9995 7845 5 10 1 1 0 0 1
131 T 10200 7800 5 10 0 0 0 0 1
134 P 10200 8400 9900 8400 1 0 0
136 T 10200 8400 5 10 0 0 0 0 1
138 T 9845 8395 5 10 1 1 0 6 1
139 pinlabel=PA2/USART2_TX/TIM2_CH3/TSC_G1_IO3/ADC_IN2/WKUP4
140 T 9995 8445 5 10 1 1 0 0 1
142 T 10200 8400 5 10 0 0 0 0 1
145 P 10200 9000 9900 9000 1 0 0
147 T 10200 9000 5 10 0 0 0 0 1
149 T 9845 8995 5 10 1 1 0 6 1
150 pinlabel=PA1/USART2_RTS/TIM2_CH2/TSC_G1_IO2/EVENTOUT/ADC_IN1
151 T 9995 9045 5 10 1 1 0 0 1
153 T 10200 9000 5 10 0 0 0 0 1
156 T 300 300 8 10 0 1 0 0 1
158 P 0 5700 300 5700 1 0 0
160 T 100 5700 5 10 0 0 0 6 1
162 T 100 5700 5 10 0 0 0 6 1
164 T 355 5695 5 10 1 1 0 0 1
165 pinlabel=PB6/I2C1_SCL/USART1_TX/TIM16_CH1N/TSC_G5_IO3
166 T 205 5745 5 10 1 1 0 6 1
169 P 0 5100 300 5100 1 0 0
171 T 100 5100 5 10 0 0 0 6 1
173 T 100 5100 5 10 0 0 0 6 1
175 T 355 5095 5 10 1 1 0 0 1
176 pinlabel=PB7/I2C1_SDA/USART1_RX/USART4_CTS/TIM17_CH1N/TSC_G5_IO4
177 T 205 5145 5 10 1 1 0 6 1
180 P 0 6300 300 6300 1 0 0
182 T 0 6300 5 10 0 0 0 6 1
184 T 0 6300 5 10 0 0 0 6 1
186 T 355 6295 5 10 1 1 0 0 1
187 pinlabel=PB5/SPI1_MOSI/I2S1_SD/I2C1_SMBA/TIM16_BKIN/TIM3_CH2/WKUP6
188 T 205 6345 5 10 1 1 0 6 1
191 P 0 6900 300 6900 1 0 0
193 T 0 6900 5 10 0 0 0 6 1
195 T 0 6900 5 10 0 0 0 6 1
197 T 355 6895 5 10 1 1 0 0 1
198 pinlabel=PB4/SPI1_MISO/I2S1_MCK/TIM17_BKIN/TIM3_CH1/TSC_G5_IO2/EVENTOUT
199 T 205 6945 5 10 1 1 0 6 1
202 P 0 9300 300 9300 1 0 0
204 T 0 9300 5 10 0 0 0 6 1
206 T 0 9300 5 10 0 0 0 6 1
208 T 355 9295 5 10 1 1 0 0 1
209 pinlabel=PB0/TIM3_CH3/TIM1_CH2N/TSC_G3_IO2/EVENTOUT/ADC_IN8
210 T 205 9345 5 10 1 1 0 6 1
213 P 0 7500 300 7500 1 0 0
215 T 0 7500 5 10 0 0 0 6 1
217 T 0 7500 5 10 0 0 0 6 1
219 T 355 7495 5 10 1 1 0 0 1
220 pinlabel=PB3/SPI1_SCK/I2S1_CK/TIM2_CH2/TSC_G5_IO1/EVENTOUT
221 T 205 7545 5 10 1 1 0 6 1
224 P 0 8700 300 8700 1 0 0
226 T 0 8700 5 10 0 0 0 6 1
228 T 0 8700 5 10 0 0 0 6 1
230 T 355 8695 5 10 1 1 0 0 1
231 pinlabel=PB1/TIM3_CH4/TIM14_CH1/TIM1_CH3N/TSC_G3_IO3/ADC_IN9
232 T 205 8745 5 10 1 1 0 6 1
235 P 4300 0 4300 300 1 0 0
237 T 4300 100 5 10 0 0 270 0 1
239 T 4300 100 5 10 0 0 270 0 1
241 T 4300 355 5 10 1 1 90 0 1
243 T 4250 205 5 10 1 1 90 6 1
246 P 7000 0 7000 300 1 0 0
248 T 7000 0 5 10 0 0 270 0 1
250 T 7000 0 5 10 0 0 270 0 1
252 T 7000 355 5 10 1 1 90 0 1
254 T 6950 205 5 10 1 1 90 6 1
257 P 6700 11600 6700 11300 1 0 0
259 T 6700 11600 5 10 0 0 90 0 1
261 T 6700 11600 5 10 0 0 90 0 1
263 T 6700 11245 5 10 1 1 90 6 1
265 T 6650 11395 5 10 1 1 90 0 1
268 P 6300 11600 6300 11300 1 0 0
270 T 6300 11600 5 10 0 0 90 0 1
272 T 6300 11600 5 10 0 0 90 0 1
274 T 6300 11245 5 10 1 1 90 6 1
276 T 6250 11395 5 10 1 1 90 0 1
279 P 3300 11600 3300 11300 1 0 0
281 T 3300 11600 5 10 0 0 90 0 1
283 T 3300 11600 5 10 0 0 90 0 1
285 T 3300 11245 5 10 1 1 90 6 1
287 T 3250 11395 5 10 1 1 90 0 1
290 P 2900 11600 2900 11300 1 0 0
292 T 2900 11600 5 10 0 0 90 0 1
294 T 2900 11600 5 10 0 0 90 0 1
296 T 2900 11245 5 10 1 1 90 6 1
298 T 2850 11395 5 10 1 1 90 0 1
301 P 0 4600 300 4600 1 0 0
303 T 0 4600 5 10 0 0 0 0 1
305 T 355 4595 5 10 1 1 0 0 1
307 T 205 4645 5 10 1 1 0 6 1
309 T 0 4600 5 10 0 0 0 0 1
312 P 3700 11600 3700 11300 1 0 0
314 T 3700 11600 5 10 0 0 0 0 1
316 T 3700 11245 5 10 1 1 90 6 1
318 T 3650 11395 5 10 1 1 90 0 1
320 T 3700 11600 5 10 0 0 0 0 1