1 /* Definitions of target machine for GNU compiler for Intel X86
3 Copyright (C) 1988, 1992, 1994, 1995 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* The purpose of this file is to define the characteristics of the i386,
24 independent of assembler syntax or operating system.
26 Three other files build on this one to describe a specific assembler syntax:
27 bsd386.h, att386.h, and sun386.h.
29 The actual tm.h file for a particular system should include
30 this file, and then the file for the appropriate assembler syntax.
32 Many macros that specify assembler syntax are omitted entirely from
33 this file because they really belong in the files for particular
34 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
35 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
36 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
38 /* Names to predefine in the preprocessor for this target machine. */
42 /* Stubs for half-pic support if not OSF/1 reference platform. */
45 #define HALF_PIC_P() 0
46 #define HALF_PIC_NUMBER_PTRS 0
47 #define HALF_PIC_NUMBER_REFS 0
48 #define HALF_PIC_ENCODE(DECL)
49 #define HALF_PIC_DECLARE(NAME)
50 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
51 #define HALF_PIC_ADDRESS_P(X) 0
52 #define HALF_PIC_PTR(X) X
53 #define HALF_PIC_FINISH(STREAM)
56 /* Run-time compilation parameters selecting different hardware subsets. */
58 extern int target_flags;
60 /* Macros used in the machine description to test the flags. */
62 /* configure can arrange to make this 2, to force a 486. */
63 #ifndef TARGET_CPU_DEFAULT
64 #define TARGET_CPU_DEFAULT 0
67 /* Masks for the -m switches */
68 #define MASK_80387 000000000001 /* Hardware floating point */
69 #define MASK_486 000000000002 /* 80486 specific */
70 #define MASK_NOTUSED1 000000000004 /* bit not currently used */
71 #define MASK_RTD 000000000010 /* Use ret that pops args */
72 #define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
73 #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
74 #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
75 #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
76 #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
78 /* Temporary codegen switches */
79 #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
80 #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
81 #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
82 #define MASK_DEBUG_ARG 000010000000 /* Debug function_arg */
84 /* Use the floating point instructions */
85 #define TARGET_80387 (target_flags & MASK_80387)
87 /* Compile using ret insn that pops args.
88 This will not work unless you use prototypes at least
89 for all functions that can take varying numbers of args. */
90 #define TARGET_RTD (target_flags & MASK_RTD)
92 /* Align doubles to a two word boundary. This breaks compatibility with
93 the published ABI's for structures containing doubles, but produces
94 faster code on the pentium. */
95 #define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
97 /* Put uninitialized locals into bss, not data.
98 Meaningful only on svr3. */
99 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
101 /* Use IEEE floating point comparisons. These handle correctly the cases
102 where the result of a comparison is unordered. Normally SIGFPE is
103 generated in such cases, in which case this isn't needed. */
104 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
106 /* Functions that return a floating point value may return that value
107 in the 387 FPU or in 386 integer registers. If set, this flag causes
108 the 387 to be used, which is compatible with most calling conventions. */
109 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
111 /* Disable generation of FP sin, cos and sqrt operations for 387.
112 This is because FreeBSD lacks these in the math-emulator-code */
113 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
115 /* Temporary switches for tuning code generation */
117 /* Disable 32x32->64 bit multiplies that are used for long long multiplies
118 and division by constants, but sometimes cause reload problems. */
119 #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
120 #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
122 /* Debug GO_IF_LEGITIMATE_ADDRESS */
123 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
125 /* Debug FUNCTION_ARG macros */
126 #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
128 /* Hack macros for tuning code generation */
129 #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
131 /* Specific hardware switches */
132 #define TARGET_486 (target_flags & MASK_486) /* 80486DX, 80486SX, 80486DX[24] */
133 #define TARGET_386 (!TARGET_486) /* 80386 */
135 #define TARGET_SWITCHES \
136 { { "80387", MASK_80387 }, \
137 { "no-80387", -MASK_80387 }, \
138 { "hard-float", MASK_80387 }, \
139 { "soft-float", -MASK_80387 }, \
140 { "no-soft-float", MASK_80387 }, \
141 { "386", -MASK_486 }, \
142 { "no-386", MASK_486 }, \
143 { "486", MASK_486 }, \
144 { "no-486", -MASK_486 }, \
145 { "rtd", MASK_RTD }, \
146 { "no-rtd", -MASK_RTD }, \
147 { "align-double", MASK_ALIGN_DOUBLE }, \
148 { "no-align-double", -MASK_ALIGN_DOUBLE }, \
149 { "svr3-shlib", MASK_SVR3_SHLIB }, \
150 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
151 { "ieee-fp", MASK_IEEE_FP }, \
152 { "no-ieee-fp", -MASK_IEEE_FP }, \
153 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
154 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
155 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
156 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
157 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
158 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
159 { "debug-addr", MASK_DEBUG_ADDR }, \
160 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
161 { "move", -MASK_NO_MOVE }, \
162 { "no-move", MASK_NO_MOVE }, \
163 { "debug-arg", MASK_DEBUG_ARG }, \
164 { "no-debug-arg", -MASK_DEBUG_ARG }, \
166 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}}
168 /* This macro is similar to `TARGET_SWITCHES' but defines names of
169 command options that have values. Its definition is an
170 initializer with a subgrouping for each command option.
172 Each subgrouping contains a string constant, that defines the
173 fixed part of the option name, and the address of a variable. The
174 variable, type `char *', is set to the variable part of the given
175 option if the fixed part matches. The actual option name is made
176 by appending `-m' to the specified name. */
177 #define TARGET_OPTIONS \
178 { { "reg-alloc=", &i386_reg_alloc_order }, \
179 { "regparm=", &i386_regparm_string }, \
180 { "align-loops=", &i386_align_loops_string }, \
181 { "align-jumps=", &i386_align_jumps_string }, \
182 { "align-functions=", &i386_align_funcs_string }, \
186 /* Sometimes certain combinations of command options do not make
187 sense on a particular target machine. You can define a macro
188 `OVERRIDE_OPTIONS' to take account of this. This macro, if
189 defined, is executed once just after all the command options have
192 Don't use this macro to turn on various extra optimizations for
193 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
195 #define OVERRIDE_OPTIONS override_options ()
197 /* These are meant to be redefined in the host dependent files */
198 #define SUBTARGET_SWITCHES
199 #define SUBTARGET_OPTIONS
202 /* target machine storage layout */
204 /* Define for XFmode extended real floating point support.
205 This will automatically cause REAL_ARITHMETIC to be defined. */
206 #define LONG_DOUBLE_TYPE_SIZE 96
208 /* Define if you don't want extended real, but do want to use the
209 software floating point emulator for REAL_ARITHMETIC and
210 decimal <-> binary conversion. */
211 /* #define REAL_ARITHMETIC */
213 /* Define this if most significant byte of a word is the lowest numbered. */
214 /* That is true on the 80386. */
216 #define BITS_BIG_ENDIAN 0
218 /* Define this if most significant byte of a word is the lowest numbered. */
219 /* That is not true on the 80386. */
220 #define BYTES_BIG_ENDIAN 0
222 /* Define this if most significant word of a multiword number is the lowest
224 /* Not true for 80386 */
225 #define WORDS_BIG_ENDIAN 0
227 /* number of bits in an addressable storage unit */
228 #define BITS_PER_UNIT 8
230 /* Width in bits of a "word", which is the contents of a machine register.
231 Note that this is not necessarily the width of data type `int';
232 if using 16-bit ints on a 80386, this would still be 32.
233 But on a machine with 16-bit registers, this would be 16. */
234 #define BITS_PER_WORD 32
236 /* Width of a word, in units (bytes). */
237 #define UNITS_PER_WORD 4
239 /* Width in bits of a pointer.
240 See also the macro `Pmode' defined below. */
241 #define POINTER_SIZE 32
243 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
244 #define PARM_BOUNDARY 32
246 /* Boundary (in *bits*) on which stack pointer should be aligned. */
247 #define STACK_BOUNDARY 32
249 /* Allocation boundary (in *bits*) for the code of a function.
250 For i486, we get better performance by aligning to a cache
251 line (i.e. 16 byte) boundary. */
252 #define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
254 /* Alignment of field after `int : 0' in a structure. */
256 #define EMPTY_FIELD_BOUNDARY 32
258 /* Minimum size in bits of the largest boundary to which any
259 and all fundamental data types supported by the hardware
260 might need to be aligned. No data type wants to be aligned
261 rounder than this. The i386 supports 64-bit floating point
262 quantities, but these can be aligned on any 32-bit boundary.
263 The published ABIs say that doubles should be aligned on word
264 boundaries, but the Pentium gets better performance with them
265 aligned on 64 bit boundaries. */
266 #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
268 /* Set this non-zero if move instructions will actually fail to work
269 when given unaligned data. */
270 #define STRICT_ALIGNMENT 0
272 /* If bit field type is int, don't let it cross an int,
273 and give entire struct the alignment of an int. */
274 /* Required on the 386 since it doesn't have bitfield insns. */
275 #define PCC_BITFIELD_TYPE_MATTERS 1
277 /* Maximum power of 2 that code can be aligned to. */
278 #define MAX_CODE_ALIGN 6 /* 64 byte alignment */
280 /* Align loop starts for optimal branching. */
281 #define ASM_OUTPUT_LOOP_ALIGN(FILE) ASM_OUTPUT_ALIGN (FILE, i386_align_loops)
283 /* This is how to align an instruction for optimal branching.
284 On i486 we'll get better performance by aligning on a
285 cache line (i.e. 16 byte) boundary. */
286 #define ASM_OUTPUT_ALIGN_CODE(FILE) ASM_OUTPUT_ALIGN ((FILE), i386_align_jumps)
289 /* Standard register usage. */
291 /* This processor has special stack-like registers. See reg-stack.c
296 /* Number of actual hardware registers.
297 The hardware registers are assigned numbers for the compiler
298 from 0 to just below FIRST_PSEUDO_REGISTER.
299 All registers that the compiler knows about must be given numbers,
300 even those that are not normally considered general registers.
302 In the 80386 we give the 8 general purpose registers the numbers 0-7.
303 We number the floating point registers 8-15.
304 Note that registers 0-7 can be accessed as a short or int,
305 while only 0-3 may be used with byte `mov' instructions.
307 Reg 16 does not correspond to any hardware register, but instead
308 appears in the RTL as an argument pointer prior to reload, and is
309 eliminated during reloading in favor of either the stack or frame
312 #define FIRST_PSEUDO_REGISTER 17
314 /* 1 for registers that have pervasive standard uses
315 and are not available for the register allocator.
316 On the 80386, the stack pointer is such, as is the arg pointer. */
317 #define FIXED_REGISTERS \
318 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
319 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
321 /* 1 for registers not available across function calls.
322 These must include the FIXED_REGISTERS and also any
323 registers that can be used without being saved.
324 The latter must include the registers where values are returned
325 and the register where structure-value addresses are passed.
326 Aside from that, you can include as many other registers as you like. */
328 #define CALL_USED_REGISTERS \
329 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
330 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
332 /* Order in which to allocate registers. Each register must be
333 listed once, even those in FIXED_REGISTERS. List frame pointer
334 late and fixed registers last. Note that, in general, we prefer
335 registers listed in CALL_USED_REGISTERS, keeping the others
336 available for storage of persistent values.
338 Three different versions of REG_ALLOC_ORDER have been tried:
340 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
341 but slower code on simple functions returning values in eax.
343 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
344 perl 4.036 due to not being able to create a DImode register (to hold a 2
347 If the order is eax, edx, ecx, ... it produces better code for simple
348 functions, and a slightly slower compiler. Users complained about the code
349 generated by allocating edx first, so restore the 'natural' order of things. */
351 #define REG_ALLOC_ORDER \
352 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
353 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
355 /* A C statement (sans semicolon) to choose the order in which to
356 allocate hard registers for pseudo-registers local to a basic
359 Store the desired register order in the array `reg_alloc_order'.
360 Element 0 should be the register to allocate first; element 1, the
361 next register; and so on.
363 The macro body should not assume anything about the contents of
364 `reg_alloc_order' before execution of the macro.
366 On most machines, it is not necessary to define this macro. */
368 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
370 /* Macro to conditionally modify fixed_regs/call_used_regs. */
371 #define CONDITIONAL_REGISTER_USAGE \
375 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
376 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
378 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
382 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
383 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
384 if (TEST_HARD_REG_BIT (x, i)) \
385 fixed_regs[i] = call_used_regs[i] = 1; \
389 /* Return number of consecutive hard regs needed starting at reg REGNO
390 to hold something of mode MODE.
391 This is ordinarily the length in words of a value of mode MODE
392 but can be less for certain modes in special long registers.
394 Actually there are no two word move instructions for consecutive
395 registers. And only registers 0-3 may have mov byte instructions
399 #define HARD_REGNO_NREGS(REGNO, MODE) \
400 (FP_REGNO_P (REGNO) ? 1 \
401 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
403 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
404 On the 80386, the first 4 cpu registers can hold any mode
405 while the floating point registers may hold only floating point.
406 Make it clear that the fp regs could not hold a 16-byte float. */
408 /* The casts to int placate a compiler on a microvax,
409 for cross-compiler testing. */
411 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
414 : FP_REGNO_P (REGNO) \
415 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
416 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
417 && GET_MODE_UNIT_SIZE (MODE) <= 12) \
418 : (int) (MODE) != (int) QImode)
420 /* Value is 1 if it is a good idea to tie two pseudo registers
421 when one has mode MODE1 and one has mode MODE2.
422 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
423 for any hard reg, then this must be 0 for correct output. */
425 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
427 /* A C expression returning the cost of moving data from a register of class
428 CLASS1 to one of CLASS2.
430 On the i386, copying between floating-point and fixed-point
431 registers is expensive. */
433 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
434 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
435 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
438 /* Specify the registers used for certain standard purposes.
439 The values of these macros are register numbers. */
441 /* on the 386 the pc register is %eip, and is not usable as a general
442 register. The ordinary mov instructions won't work */
443 /* #define PC_REGNUM */
445 /* Register to use for pushing function arguments. */
446 #define STACK_POINTER_REGNUM 7
448 /* Base register for access to local variables of the function. */
449 #define FRAME_POINTER_REGNUM 6
451 /* First floating point reg */
452 #define FIRST_FLOAT_REG 8
454 /* First & last stack-like regs */
455 #define FIRST_STACK_REG FIRST_FLOAT_REG
456 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
458 /* Value should be nonzero if functions must have frame pointers.
459 Zero means the frame pointer need not be set up (and parms
460 may be accessed via the stack pointer) in functions that seem suitable.
461 This is computed in `reload', in reload1.c. */
462 #define FRAME_POINTER_REQUIRED 0
464 /* Base register for access to arguments of the function. */
465 #define ARG_POINTER_REGNUM 16
467 /* Register in which static-chain is passed to a function. */
468 #define STATIC_CHAIN_REGNUM 2
470 /* Register to hold the addressing base for position independent
471 code access to data items. */
472 #define PIC_OFFSET_TABLE_REGNUM 3
474 /* Register in which address to store a structure value
475 arrives in the function. On the 386, the prologue
476 copies this from the stack to register %eax. */
477 #define STRUCT_VALUE_INCOMING 0
479 /* Place in which caller passes the structure value address.
480 0 means push the value on the stack like an argument. */
481 #define STRUCT_VALUE 0
483 /* A C expression which can inhibit the returning of certain function
484 values in registers, based on the type of value. A nonzero value
485 says to return the function value in memory, just as large
486 structures are always returned. Here TYPE will be a C expression
487 of type `tree', representing the data type of the value.
489 Note that values of mode `BLKmode' must be explicitly handled by
490 this macro. Also, the option `-fpcc-struct-return' takes effect
491 regardless of this macro. On most systems, it is possible to
492 leave the macro undefined; this causes a default definition to be
493 used, whose value is the constant 1 for `BLKmode' values, and 0
496 Do not use this macro to indicate that structures and unions
497 should always be returned in memory. You should instead use
498 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
500 #define RETURN_IN_MEMORY(TYPE) \
501 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
504 /* Define the classes of registers for register constraints in the
505 machine description. Also define ranges of constants.
507 One of the classes must always be named ALL_REGS and include all hard regs.
508 If there is more than one class, another class must be named NO_REGS
509 and contain no registers.
511 The name GENERAL_REGS must be the name of a class (or an alias for
512 another name such as ALL_REGS). This is the class of registers
513 that is allowed by "g" or "r" in a register constraint.
514 Also, registers outside this class are allocated only when
515 instructions express preferences for them.
517 The classes must be numbered in nondecreasing order; that is,
518 a larger-numbered class must never be contained completely
519 in a smaller-numbered class.
521 For any two classes, it is very desirable that there be another
522 class that represents their union.
524 It might seem that class BREG is unnecessary, since no useful 386
525 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
526 and the "b" register constraint is useful in asms for syscalls. */
531 // AREG, DREG, CREG, BREG,
532 // AD_REGS, /* %eax/%edx for DImode */
533 // Q_REGS, /* %eax %ebx %ecx %edx */
535 // INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
536 // GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
537 // FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
539 // ALL_REGS, LIM_REG_CLASSES
542 #define N_REG_CLASSES (int) LIM_REG_CLASSES
544 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
546 /* Give names of register classes as strings for dump file. */
548 #define REG_CLASS_NAMES \
550 "AREG", "DREG", "CREG", "BREG", \
556 "FP_TOP_REG", "FP_SECOND_REG", \
560 /* Define which registers fit in which classes.
561 This is an initializer for a vector of HARD_REG_SET
562 of length N_REG_CLASSES. */
564 #define REG_CLASS_CONTENTS \
566 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
569 0x10, 0x20, /* SIREG, DIREG */ \
570 0x07f, /* INDEX_REGS */ \
571 0x100ff, /* GENERAL_REGS */ \
572 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
573 0xff00, /* FLOAT_REGS */ \
576 /* The same information, inverted:
577 Return the class number of the smallest class containing
578 reg number REGNO. This could be a conditional expression
579 or could index an array. */
581 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
583 /* When defined, the compiler allows registers explicitly used in the
584 rtl to be used as spill registers but prevents the compiler from
585 extending the lifetime of these registers. */
587 #define SMALL_REGISTER_CLASSES
589 #define QI_REG_P(X) \
590 (REG_P (X) && REGNO (X) < 4)
591 #define NON_QI_REG_P(X) \
592 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
594 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
595 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
597 #define STACK_REG_P(xop) (REG_P (xop) && \
598 REGNO (xop) >= FIRST_STACK_REG && \
599 REGNO (xop) <= LAST_STACK_REG)
601 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
603 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
605 /* Try to maintain the accuracy of the death notes for regs satisfying the
606 following. Important for stack like regs, to know when to pop. */
608 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
610 /* 1 if register REGNO can magically overlap other regs.
611 Note that nonzero values work only in very special circumstances. */
613 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
615 /* The class value for index registers, and the one for base regs. */
617 #define INDEX_REG_CLASS INDEX_REGS
618 #define BASE_REG_CLASS GENERAL_REGS
620 /* Get reg_class from a letter such as appears in the machine description. */
622 #define REG_CLASS_FROM_LETTER(C) \
623 ((C) == 'r' ? GENERAL_REGS : \
624 (C) == 'q' ? Q_REGS : \
625 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
628 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
631 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
634 (C) == 'a' ? AREG : \
635 (C) == 'b' ? BREG : \
636 (C) == 'c' ? CREG : \
637 (C) == 'd' ? DREG : \
638 (C) == 'A' ? AD_REGS : \
639 (C) == 'D' ? DIREG : \
640 (C) == 'S' ? SIREG : NO_REGS)
642 /* The letters I, J, K, L and M in a register constraint string
643 can be used to stand for particular ranges of immediate operands.
644 This macro defines what the ranges are.
645 C is the letter, and VALUE is a constant value.
646 Return 1 if VALUE is in the range specified by C.
648 I is for non-DImode shifts.
649 J is for DImode shifts.
650 K and L are for an `andsi' optimization.
651 M is for shifts that can be executed by the "lea" opcode.
654 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
655 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
656 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
657 (C) == 'K' ? (VALUE) == 0xff : \
658 (C) == 'L' ? (VALUE) == 0xffff : \
659 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
660 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
663 /* Similar, but for floating constants, and defining letters G and H.
664 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
665 TARGET_387 isn't set, because the stack register converter may need to
666 load 0.0 into the function value register. */
668 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
669 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
671 /* Place additional restrictions on the register class to use when it
672 is necessary to be able to hold a value of mode MODE in a reload
673 register for which class CLASS would ordinarily be used. */
675 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
676 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
679 /* Given an rtx X being reloaded into a reg required to be
680 in class CLASS, return the class of reg to actually use.
681 In general this is just CLASS; but on some machines
682 in some cases it is preferable to use a more restrictive class.
683 On the 80386 series, we prevent floating constants from being
684 reloaded into floating registers (since no move-insn can do that)
685 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
687 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
688 QImode must go into class Q_REGS.
689 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
690 movdf to do mem-to-mem moves through integer regs. */
692 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
693 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
694 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
695 : ((CLASS) == ALL_REGS \
696 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
699 /* If we are copying between general and FP registers, we need a memory
702 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
703 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
704 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
706 /* Return the maximum number of consecutive registers
707 needed to represent mode MODE in a register of class CLASS. */
708 /* On the 80386, this is the size of MODE in words,
709 except in the FP regs, where a single reg is always enough. */
710 #define CLASS_MAX_NREGS(CLASS, MODE) \
711 (FLOAT_CLASS_P (CLASS) ? 1 : \
712 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
714 /* A C expression whose value is nonzero if pseudos that have been
715 assigned to registers of class CLASS would likely be spilled
716 because registers of CLASS are needed for spill registers.
718 The default value of this macro returns 1 if CLASS has exactly one
719 register and zero otherwise. On most machines, this default
720 should be used. Only define this macro to some other expression
721 if pseudo allocated by `local-alloc.c' end up in memory because
722 their hard registers were needed for spill registers. If this
723 macro returns nonzero for those classes, those pseudos will only
724 be allocated by `global.c', which knows how to reallocate the
725 pseudo to another register. If there would not be another
726 register available for reallocation, you should not change the
727 definition of this macro since the only effect of such a
728 definition would be to slow down register allocation. */
730 #define CLASS_LIKELY_SPILLED_P(CLASS) \
732 || ((CLASS) == DREG) \
733 || ((CLASS) == CREG) \
734 || ((CLASS) == BREG) \
735 || ((CLASS) == AD_REGS) \
736 || ((CLASS) == SIREG) \
737 || ((CLASS) == DIREG))
740 /* Stack layout; function entry, exit and calling. */
742 /* Define this if pushing a word on the stack
743 makes the stack pointer a smaller address. */
744 #define STACK_GROWS_DOWNWARD
746 /* Define this if the nominal address of the stack frame
747 is at the high-address end of the local variables;
748 that is, each additional local variable allocated
749 goes at a more negative offset in the frame. */
750 #define FRAME_GROWS_DOWNWARD
752 /* Offset within stack frame to start allocating local variables at.
753 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
754 first local allocated. Otherwise, it is the offset to the BEGINNING
755 of the first local allocated. */
756 #define STARTING_FRAME_OFFSET 0
758 /* If we generate an insn to push BYTES bytes,
759 this says how many the stack pointer really advances by.
760 On 386 pushw decrements by exactly 2 no matter what the position was.
761 On the 386 there is no pushb; we use pushw instead, and this
762 has the effect of rounding up to 2. */
764 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
766 /* Offset of first parameter from the argument pointer register value. */
767 #define FIRST_PARM_OFFSET(FNDECL) 0
769 /* Value is the number of bytes of arguments automatically
770 popped when returning from a subroutine call.
771 FUNDECL is the declaration node of the function (as a tree),
772 FUNTYPE is the data type of the function (as a tree),
773 or for a library call it is an identifier node for the subroutine name.
774 SIZE is the number of bytes of arguments passed on the stack.
776 On the 80386, the RTD insn may be used to pop them if the number
777 of args is fixed, but if the number is variable then the caller
778 must pop them all. RTD can't be used for library calls now
779 because the library is compiled with the Unix compiler.
780 Use of RTD is a selectable option, since it is incompatible with
781 standard Unix calling sequences. If the option is not selected,
782 the caller must always pop the args.
784 The attribute stdcall is equivalent to RTD on a per module basis. */
786 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
787 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
789 /* Define how to find the value returned by a function.
790 VALTYPE is the data type of the value (as a tree).
791 If the precise function being called is known, FUNC is its FUNCTION_DECL;
792 otherwise, FUNC is 0. */
793 #define FUNCTION_VALUE(VALTYPE, FUNC) \
794 gen_rtx (REG, TYPE_MODE (VALTYPE), \
795 VALUE_REGNO (TYPE_MODE (VALTYPE)))
797 /* Define how to find the value returned by a library function
798 assuming the value has mode MODE. */
800 #define LIBCALL_VALUE(MODE) \
801 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
803 /* Define the size of the result block used for communication between
804 untyped_call and untyped_return. The block contains a DImode value
805 followed by the block used by fnsave and frstor. */
807 #define APPLY_RESULT_SIZE (8+108)
809 /* 1 if N is a possible register number for function argument passing. */
810 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
812 /* Define a data type for recording info about an argument list
813 during the scan of that argument list. This data type should
814 hold all necessary information about the function itself
815 and about the args processed so far, enough to enable macros
816 such as FUNCTION_ARG to determine where the next arg should go. */
818 //typedef struct i386_args {
819 // int words; /* # words passed so far */
820 // int nregs; /* # registers available for passing */
821 // int regno; /* next available register number */
824 /* Initialize a variable CUM of type CUMULATIVE_ARGS
825 for a call to a function whose data type is FNTYPE.
826 For a library call, FNTYPE is 0. */
828 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
829 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
831 /* Update the data in CUM to advance over an argument
832 of mode MODE and data type TYPE.
833 (TYPE is null for libcalls where that information may not be available.) */
835 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
836 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
838 /* Define where to put the arguments to a function.
839 Value is zero to push the argument on the stack,
840 or a hard register in which to store the argument.
842 MODE is the argument's machine mode.
843 TYPE is the data type of the argument (as a tree).
844 This is null for libcalls where that information may
846 CUM is a variable of type CUMULATIVE_ARGS which gives info about
847 the preceding args and about the function being called.
848 NAMED is nonzero if this argument is a named parameter
849 (otherwise it is an extra parameter matching an ellipsis). */
851 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
852 (function_arg (&CUM, MODE, TYPE, NAMED))
854 /* For an arg passed partly in registers and partly in memory,
855 this is the number of registers used.
856 For args passed entirely in registers or entirely in memory, zero. */
858 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
859 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
861 /* This macro generates the assembly code for function entry.
862 FILE is a stdio stream to output the code to.
863 SIZE is an int: how many units of temporary storage to allocate.
864 Refer to the array `regs_ever_live' to determine which registers
865 to save; `regs_ever_live[I]' is nonzero if register number I
866 is ever used in the function. This macro is responsible for
867 knowing which registers should not be saved even if used. */
869 #define FUNCTION_PROLOGUE(FILE, SIZE) \
870 function_prologue (FILE, SIZE)
872 /* Output assembler code to FILE to increment profiler label # LABELNO
873 for profiling a function entry. */
875 #define FUNCTION_PROFILER(FILE, LABELNO) \
879 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
880 LPREFIX, (LABELNO)); \
881 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
885 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
886 fprintf (FILE, "\tcall _mcount\n"); \
890 /* A C statement or compound statement to output to FILE some
891 assembler code to initialize basic-block profiling for the current
892 object module. This code should call the subroutine
893 `__bb_init_func' once per object module, passing it as its sole
894 argument the address of a block allocated in the object module.
896 The name of the block is a local symbol made with this statement:
898 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
900 Of course, since you are writing the definition of
901 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
902 can take a short cut in the definition of this macro and use the
903 name that you know will result.
905 The first word of this block is a flag which will be nonzero if the
906 object module has already been initialized. So test this word
907 first, and do not call `__bb_init_func' if the flag is nonzero. */
909 #undef FUNCTION_BLOCK_PROFILER
910 #define FUNCTION_BLOCK_PROFILER(STREAM, LABELNO) \
913 static int num_func = 0; \
915 char block_table[80], false_label[80]; \
917 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
918 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
920 xops[0] = const0_rtx; \
921 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
922 xops[2] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, false_label)); \
923 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_func")); \
924 xops[4] = gen_rtx (MEM, Pmode, xops[1]); \
925 xops[5] = stack_pointer_rtx; \
926 xops[6] = GEN_INT (4); \
927 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
929 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
930 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
932 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
933 output_asm_insn (AS1(jne,%2), xops); \
936 output_asm_insn (AS1(push%L1,%1), xops); \
939 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
940 output_asm_insn (AS1 (push%L7,%7), xops); \
943 output_asm_insn (AS1(call,%P3), xops); \
944 output_asm_insn (AS2(add%L0,%6,%5), xops); \
945 ASM_OUTPUT_INTERNAL_LABEL (STREAM, "LPBZ", num_func); \
951 /* A C statement or compound statement to increment the count
952 associated with the basic block number BLOCKNO. Basic blocks are
953 numbered separately from zero within each compilation. The count
954 associated with block number BLOCKNO is at index BLOCKNO in a
955 vector of words; the name of this array is a local symbol made
958 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
960 Of course, since you are writing the definition of
961 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
962 can take a short cut in the definition of this macro and use the
963 name that you know will result. */
965 #define BLOCK_PROFILER(STREAM, BLOCKNO) \
968 rtx xops[1], cnt_rtx; \
971 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
972 cnt_rtx = gen_rtx (SYMBOL_REF, VOIDmode, counts); \
973 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
976 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
979 cnt_rtx = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, cnt_rtx); \
981 xops[0] = gen_rtx (MEM, SImode, cnt_rtx); \
982 output_asm_insn (AS1(inc%L0,%0), xops); \
986 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
987 the stack pointer does not matter. The value is tested only in
988 functions that have frame pointers.
989 No definition is equivalent to always zero. */
990 /* Note on the 386 it might be more efficient not to define this since
991 we have to restore it ourselves from the frame pointer, in order to
994 #define EXIT_IGNORE_STACK 1
996 /* This macro generates the assembly code for function exit,
997 on machines that need it. If FUNCTION_EPILOGUE is not defined
998 then individual return instructions are generated for each
999 return statement. Args are same as for FUNCTION_PROLOGUE.
1001 The function epilogue should not depend on the current stack pointer!
1002 It should use the frame pointer only. This is mandatory because
1003 of alloca; we also take advantage of it to omit stack adjustments
1006 If the last non-note insn in the function is a BARRIER, then there
1007 is no need to emit a function prologue, because control does not fall
1008 off the end. This happens if the function ends in an "exit" call, or
1009 if a `return' insn is emitted directly into the function. */
1011 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1013 rtx last = get_last_insn (); \
1014 if (last && GET_CODE (last) == NOTE) \
1015 last = prev_nonnote_insn (last); \
1016 if (! last || GET_CODE (last) != BARRIER) \
1017 function_epilogue (FILE, SIZE); \
1020 /* Output assembler code for a block containing the constant parts
1021 of a trampoline, leaving space for the variable parts. */
1023 /* On the 386, the trampoline contains three instructions:
1027 #define TRAMPOLINE_TEMPLATE(FILE) \
1029 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
1030 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1031 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1032 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
1033 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1034 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1035 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
1036 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
1039 /* Length in units of the trampoline for entering a nested function. */
1041 #define TRAMPOLINE_SIZE 12
1043 /* Emit RTL insns to initialize the variable parts of a trampoline.
1044 FNADDR is an RTX for the address of the function's pure code.
1045 CXT is an RTX for the static chain value for the function. */
1047 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1049 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
1050 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
1053 /* Definitions for register eliminations.
1055 This is an array of structures. Each structure initializes one pair
1056 of eliminable registers. The "from" register number is given first,
1057 followed by "to". Eliminations of the same "from" register are listed
1058 in order of preference.
1060 We have two registers that can be eliminated on the i386. First, the
1061 frame pointer register can often be eliminated in favor of the stack
1062 pointer register. Secondly, the argument pointer register can always be
1063 eliminated; it is replaced with either the stack or frame pointer. */
1065 #define ELIMINABLE_REGS \
1066 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1067 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1068 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1070 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1071 Frame pointer elimination is automatically handled.
1073 For the i386, if frame pointer elimination is being done, we would like to
1074 convert ap into sp, not fp.
1076 All other eliminations are valid. */
1078 #define CAN_ELIMINATE(FROM, TO) \
1079 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1080 ? ! frame_pointer_needed \
1083 /* Define the offset between two registers, one to be eliminated, and the other
1084 its replacement, at the start of a routine. */
1086 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1088 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1089 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1095 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1096 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
1097 || (current_function_uses_pic_offset_table \
1098 && regno == PIC_OFFSET_TABLE_REGNUM)) \
1101 (OFFSET) = offset + get_frame_size (); \
1103 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1104 (OFFSET) += 4; /* Skip saved PC */ \
1108 /* Addressing modes, and classification of registers for them. */
1110 /* #define HAVE_POST_INCREMENT */
1111 /* #define HAVE_POST_DECREMENT */
1113 /* #define HAVE_PRE_DECREMENT */
1114 /* #define HAVE_PRE_INCREMENT */
1116 /* Macros to check register numbers against specific register classes. */
1118 /* These assume that REGNO is a hard or pseudo reg number.
1119 They give nonzero only if REGNO is a hard reg of the suitable class
1120 or a pseudo reg currently allocated to a suitable hard reg.
1121 Since they use reg_renumber, they are safe only once reg_renumber
1122 has been allocated, which happens in local-alloc.c. */
1124 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1125 ((REGNO) < STACK_POINTER_REGNUM \
1126 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1128 #define REGNO_OK_FOR_BASE_P(REGNO) \
1129 ((REGNO) <= STACK_POINTER_REGNUM \
1130 || (REGNO) == ARG_POINTER_REGNUM \
1131 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1133 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1134 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1136 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1137 and check its validity for a certain class.
1138 We have two alternate definitions for each of them.
1139 The usual definition accepts all pseudo regs; the other rejects
1140 them unless they have been allocated suitable hard regs.
1141 The symbol REG_OK_STRICT causes the latter definition to be used.
1143 Most source files want to accept pseudo regs in the hope that
1144 they will get allocated to the class that the insn wants them to be in.
1145 Source files for reload pass need to be strict.
1146 After reload, it makes no difference, since pseudo regs have
1147 been eliminated by then. */
1150 /* Non strict versions, pseudos are ok */
1151 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1152 (REGNO (X) < STACK_POINTER_REGNUM \
1153 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1155 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1156 (REGNO (X) <= STACK_POINTER_REGNUM \
1157 || REGNO (X) == ARG_POINTER_REGNUM \
1158 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1160 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1161 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1163 /* Strict versions, hard registers only */
1164 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1165 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1166 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1167 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1169 #ifndef REG_OK_STRICT
1170 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1171 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1172 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1175 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1176 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1177 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1180 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1181 that is a valid memory address for an instruction.
1182 The MODE argument is the machine mode for the MEM expression
1183 that wants to use this address.
1185 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1186 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1188 See legitimize_pic_address in i386.c for details as to what
1189 constitutes a legitimate address when -fpic is used. */
1191 #define MAX_REGS_PER_ADDRESS 2
1193 #define CONSTANT_ADDRESS_P(X) \
1194 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1195 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1196 || GET_CODE (X) == HIGH)
1198 /* Nonzero if the constant value X is a legitimate general operand.
1199 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1201 #define LEGITIMATE_CONSTANT_P(X) 1
1203 #ifdef REG_OK_STRICT
1204 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1206 if (legitimate_address_p (MODE, X, 1)) \
1211 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1213 if (legitimate_address_p (MODE, X, 0)) \
1219 /* Try machine-dependent ways of modifying an illegitimate address
1220 to be legitimate. If we find one, return the new, valid address.
1221 This macro is used in only one place: `memory_address' in explow.c.
1223 OLDX is the address as it was before break_out_memory_refs was called.
1224 In some cases it is useful to look at this to decide what needs to be done.
1226 MODE and WIN are passed so that this macro can use
1227 GO_IF_LEGITIMATE_ADDRESS.
1229 It is always safe for this macro to do nothing. It exists to recognize
1230 opportunities to optimize the output.
1232 For the 80386, we handle X+REG by loading X into a register R and
1233 using R+REG. R will go in a general reg and indexing will be used.
1234 However, if REG is a broken-out memory address or multiplication,
1235 nothing needs to be done because REG can certainly go in a general reg.
1237 When -fpic is used, special handling is needed for symbolic references.
1238 See comments by legitimize_pic_address in i386.c for details. */
1240 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1243 (X) = legitimize_address (X, OLDX, MODE); \
1244 if (memory_address_p (MODE, X)) \
1248 /* Nonzero if the constant value X is a legitimate general operand
1249 when generating PIC code. It is given that flag_pic is on and
1250 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1252 #define LEGITIMATE_PIC_OPERAND_P(X) \
1253 (! SYMBOLIC_CONST (X) \
1254 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1256 #define SYMBOLIC_CONST(X) \
1257 (GET_CODE (X) == SYMBOL_REF \
1258 || GET_CODE (X) == LABEL_REF \
1259 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1261 /* Go to LABEL if ADDR (a legitimate address expression)
1262 has an effect that depends on the machine mode it is used for.
1263 On the 80386, only postdecrement and postincrement address depend thus
1264 (the amount of decrement or increment being the length of the operand). */
1265 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1266 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1268 /* Define this macro if references to a symbol must be treated
1269 differently depending on something about the variable or
1270 function named by the symbol (such as what section it is in).
1272 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1273 so that we may access it directly in the GOT. */
1275 #define ENCODE_SECTION_INFO(DECL) \
1280 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1281 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1282 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1283 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1284 || ! TREE_PUBLIC (DECL)); \
1289 /* Initialize data used by insn expanders. This is called from
1290 init_emit, once for each function, before code is generated.
1291 For 386, clear stack slot assignments remembered from previous
1294 #define INIT_EXPANDERS clear_386_stack_locals ()
1296 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1297 codes once the function is being compiled into assembly code, but
1298 not before. (It is not done before, because in the case of
1299 compiling an inline function, it would lead to multiple PIC
1300 prologues being included in functions which used inline functions
1301 and were compiled to assembly language.) */
1303 #define FINALIZE_PIC \
1306 extern int current_function_uses_pic_offset_table; \
1308 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1313 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1314 with arguments ARGS is a valid machine specific attribute for DECL.
1315 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1317 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1318 (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1320 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1321 with arguments ARGS is a valid machine specific attribute for TYPE.
1322 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1324 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1325 (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1327 /* If defined, a C expression whose value is zero if the attributes on
1328 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1329 two if they are nearly compatible (which causes a warning to be
1332 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1333 (i386_comp_type_attributes (TYPE1, TYPE2))
1335 /* If defined, a C statement that assigns default attributes to newly
1338 /* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1340 /* Max number of args passed in registers. If this is more than 3, we will
1341 have problems with ebx (register #4), since it is a caller save register and
1342 is also used as the pic register in ELF. So for now, don't allow more than
1343 3 registers to be passed in registers. */
1345 #define REGPARM_MAX 3
1348 /* Specify the machine mode that this machine uses
1349 for the index in the tablejump instruction. */
1350 #define CASE_VECTOR_MODE Pmode
1352 /* Define this if the tablejump instruction expects the table
1353 to contain offsets from the address of the table.
1354 Do not define this if the table should contain absolute addresses. */
1355 /* #define CASE_VECTOR_PC_RELATIVE */
1357 /* Specify the tree operation to be used to convert reals to integers.
1358 This should be changed to take advantage of fist --wfs ??
1360 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1362 /* This is the kind of divide that is easiest to do in the general case. */
1363 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1365 /* Define this as 1 if `char' should by default be signed; else as 0. */
1366 #define DEFAULT_SIGNED_CHAR 1
1368 /* Max number of bytes we can move from memory to memory
1369 in one reasonably fast instruction. */
1372 /* MOVE_RATIO is the number of move instructions that is better than a
1373 block move. Make this large on i386, since the block move is very
1374 inefficient with small blocks, and the hard register needs of the
1375 block move require much reload work. */
1376 #define MOVE_RATIO 5
1378 /* Define this if zero-extension is slow (more than one real instruction). */
1379 /* #define SLOW_ZERO_EXTEND */
1381 /* Nonzero if access to memory by bytes is slow and undesirable. */
1382 #define SLOW_BYTE_ACCESS 0
1384 /* Define if shifts truncate the shift count
1385 which implies one can omit a sign-extension or zero-extension
1386 of a shift count. */
1387 /* One i386, shifts do truncate the count. But bit opcodes don't. */
1389 /* #define SHIFT_COUNT_TRUNCATED */
1391 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1392 is done just by pretending it is already truncated. */
1393 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1395 /* We assume that the store-condition-codes instructions store 0 for false
1396 and some other value for true. This is the value stored for true. */
1398 #define STORE_FLAG_VALUE 1
1400 /* When a prototype says `char' or `short', really pass an `int'.
1401 (The 386 can't easily push less than an int.) */
1403 #define PROMOTE_PROTOTYPES
1405 /* Specify the machine mode that pointers have.
1406 After generation of rtl, the compiler makes no further distinction
1407 between pointers and any other objects of this machine mode. */
1408 #define Pmode SImode
1410 /* A function address in a call instruction
1411 is a byte address (for indexing purposes)
1412 so give the MEM rtx a byte's mode. */
1413 #define FUNCTION_MODE QImode
1415 /* Define this if addresses of constant functions
1416 shouldn't be put through pseudo regs where they can be cse'd.
1417 Desirable on the 386 because a CALL with a constant address is
1418 not much slower than one with a register address. On a 486,
1419 it is faster to call with a constant address than indirect. */
1420 #define NO_FUNCTION_CSE
1422 /* Provide the costs of a rtl expression. This is in the body of a
1425 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1427 return COSTS_N_INSNS (20); \
1432 return COSTS_N_INSNS (20); \
1436 return (4 + rtx_cost (XEXP (X, 0), OUTER_CODE) \
1437 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1439 if (GET_CODE (XEXP (X, 0)) == MULT \
1440 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1441 && (INTVAL (XEXP (XEXP (X, 0), 1)) == 2 \
1442 || INTVAL (XEXP (XEXP (X, 0), 1)) == 4 \
1443 || INTVAL (XEXP (XEXP (X, 0), 1)) == 8)) \
1444 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1445 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1449 /* Compute the cost of computing a constant rtl expression RTX
1450 whose rtx-code is CODE. The body of this macro is a portion
1451 of a switch statement. If the code is computed here,
1452 return it with a return statement. Otherwise, break from the switch. */
1454 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1459 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1460 case CONST_DOUBLE: \
1463 if (GET_MODE (RTX) == VOIDmode) \
1465 code = standard_80387_constant_p (RTX); \
1466 return code == 1 ? 0 : \
1471 /* Compute the cost of an address. This is meant to approximate the size
1472 and/or execution delay of an insn using that address. If the cost is
1473 approximated by the RTL complexity, including CONST_COSTS above, as
1474 is usually the case for CISC machines, this macro should not be defined.
1475 For aggressively RISCy machines, only one insn format is allowed, so
1476 this macro should be a constant. The value of this macro only matters
1477 for valid addresses.
1479 For i386, it is better to use a complex address than let gcc copy
1480 the address into a reg and make a new pseudo. But not if the address
1481 requires to two regs - that would mean more pseudos with longer
1484 #define ADDRESS_COST(RTX) \
1485 ((CONSTANT_P (RTX) \
1486 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1487 && REG_P (XEXP (RTX, 0)))) ? 0 \
1491 /* Add any extra modes needed to represent the condition code.
1493 For the i386, we need separate modes when floating-point equality
1494 comparisons are being done. */
1496 #define EXTRA_CC_MODES CCFPEQmode
1498 /* Define the names for the modes specified above. */
1499 #define EXTRA_CC_NAMES "CCFPEQ"
1501 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1502 return the mode to be used for the comparison.
1504 For floating-point equality comparisons, CCFPEQmode should be used.
1505 VOIDmode should be used in all other cases. */
1507 #define SELECT_CC_MODE(OP,X,Y) \
1508 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1509 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
1511 /* Define the information needed to generate branch and scc insns. This is
1512 stored from the compare operation. Note that we can't use "rtx" here
1513 since it hasn't been defined! */
1515 extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
1517 /* Tell final.c how to eliminate redundant test instructions. */
1519 /* Here we define machine-dependent flags and fields in cc_status
1520 (see `conditions.h'). */
1522 /* Set if the cc value is actually in the 80387, so a floating point
1523 conditional branch must be output. */
1524 #define CC_IN_80387 04000
1526 /* Set if the CC value was stored in a nonstandard way, so that
1527 the state of equality is indicated by zero in the carry bit. */
1528 #define CC_Z_IN_NOT_C 010000
1530 /* Store in cc_status the expressions
1531 that the condition codes will describe
1532 after execution of an instruction whose pattern is EXP.
1533 Do not alter them if the instruction would not alter the cc's. */
1535 #define NOTICE_UPDATE_CC(EXP, INSN) \
1536 notice_update_cc((EXP))
1538 /* Output a signed jump insn. Use template NORMAL ordinarily, or
1539 FLOAT following a floating point comparison.
1540 Use NO_OV following an arithmetic insn that set the cc's
1541 before a test insn that was deleted.
1542 NO_OV may be zero, meaning final should reinsert the test insn
1543 because the jump cannot be handled properly without it. */
1545 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1547 if (cc_prev_status.flags & CC_IN_80387) \
1549 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1554 /* Control the assembler format that we output, to the extent
1555 this does not vary between assemblers. */
1557 /* How to refer to registers in assembler output.
1558 This sequence is indexed by compiler's hard-register-number (see above). */
1560 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
1561 For non floating point regs, the following are the HImode names.
1563 For float regs, the stack top is sometimes referred to as "%st(0)"
1564 instead of just "%st". PRINT_REG handles this with the "y" code. */
1566 #define HI_REGISTER_NAMES \
1567 {"ax","dx","cx","bx","si","di","bp","sp", \
1568 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1570 #define REGISTER_NAMES HI_REGISTER_NAMES
1572 /* Table of additional register names to use in user input. */
1574 #define ADDITIONAL_REGISTER_NAMES \
1575 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1576 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1577 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1578 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
1580 /* Note we are omitting these since currently I don't know how
1581 to get gcc to use these, since they want the same but different
1582 number as al, and ax.
1585 /* note the last four are not really qi_registers, but
1586 the md will have to never output movb into one of them
1587 only a movw . There is no movb into the last four regs */
1589 #define QI_REGISTER_NAMES \
1590 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
1592 /* These parallel the array above, and can be used to access bits 8:15
1593 of regs 0 through 3. */
1595 #define QI_HIGH_REGISTER_NAMES \
1596 {"ah", "dh", "ch", "bh", }
1598 /* How to renumber registers for dbx and gdb. */
1600 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
1601 #define DBX_REGISTER_NUMBER(n) \
1612 /* This is how to output the definition of a user-level label named NAME,
1613 such as the label on a static function or variable NAME. */
1615 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1616 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1618 /* This is how to output an assembler line defining a `double' constant. */
1620 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1622 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
1623 if (sizeof (int) == sizeof (long)) \
1624 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, l[0], l[1]); \
1626 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
1629 /* This is how to output a `long double' extended real constant. */
1631 #undef ASM_OUTPUT_LONG_DOUBLE
1632 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
1634 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
1635 if (sizeof (int) == sizeof (long)) \
1636 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, l[0], l[1], l[2]); \
1638 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
1641 /* This is how to output an assembler line defining a `float' constant. */
1643 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1645 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1646 if (sizeof (int) == sizeof (long)) \
1647 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, l); \
1649 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
1652 /* Store in OUTPUT a string (made with alloca) containing
1653 an assembler-name for a local static variable named NAME.
1654 LABELNO is an integer which is different for each call. */
1656 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1657 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1658 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1662 /* This is how to output an assembler line defining an `int' constant. */
1664 #define ASM_OUTPUT_INT(FILE,VALUE) \
1665 ( fprintf (FILE, "%s ", ASM_LONG), \
1666 output_addr_const (FILE,(VALUE)), \
1669 /* Likewise for `char' and `short' constants. */
1670 /* is this supposed to do align too?? */
1672 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1673 ( fprintf (FILE, "%s ", ASM_SHORT), \
1674 output_addr_const (FILE,(VALUE)), \
1678 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1679 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1680 output_addr_const (FILE,(VALUE)), \
1681 fputs (",", FILE), \
1682 output_addr_const (FILE,(VALUE)), \
1683 fputs (" >> 8\n",FILE))
1687 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1688 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1689 output_addr_const (FILE, (VALUE)), \
1692 /* This is how to output an assembler line for a numeric constant byte. */
1694 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1695 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1697 /* This is how to output an insn to push a register on the stack.
1698 It need not be very fast code. */
1700 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1701 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1703 /* This is how to output an insn to pop a register from the stack.
1704 It need not be very fast code. */
1706 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1707 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1709 /* This is how to output an element of a case-vector that is absolute.
1712 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1713 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1715 /* This is how to output an element of a case-vector that is relative.
1716 We don't use these on the 386 yet, because the ATT assembler can't do
1717 forward reference the differences.
1720 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1721 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1723 /* Define the parentheses used to group arithmetic operations
1724 in assembler code. */
1726 #define ASM_OPEN_PAREN ""
1727 #define ASM_CLOSE_PAREN ""
1729 /* Define results of standard character escape sequences. */
1730 #define TARGET_BELL 007
1731 #define TARGET_BS 010
1732 #define TARGET_TAB 011
1733 #define TARGET_NEWLINE 012
1734 #define TARGET_VT 013
1735 #define TARGET_FF 014
1736 #define TARGET_CR 015
1738 /* Print operand X (an rtx) in assembler syntax to file FILE.
1739 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1740 The CODE z takes the size of operand from the following digit, and
1741 outputs b,w,or l respectively.
1743 On the 80386, we use several such letters:
1744 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1745 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
1746 R -- print the prefix for register names.
1747 z -- print the opcode suffix for the size of the current operand.
1748 * -- print a star (in certain assembler syntax)
1749 w -- print the operand as if it's a "word" (HImode) even if it isn't.
1750 b -- print the operand as if it's a byte (QImode) even if it isn't.
1751 c -- don't print special prefixes before constant operands. */
1753 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1756 /* Print the name of a register based on its machine mode and number.
1757 If CODE is 'w', pretend the mode is HImode.
1758 If CODE is 'b', pretend the mode is QImode.
1759 If CODE is 'k', pretend the mode is SImode.
1760 If CODE is 'h', pretend the reg is the `high' byte register.
1761 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
1763 extern char *hi_reg_name[];
1764 extern char *qi_reg_name[];
1765 extern char *qi_high_reg_name[];
1767 #define PRINT_REG(X, CODE, FILE) \
1768 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
1770 fprintf (FILE, "%s", RP); \
1771 switch ((CODE == 'w' ? 2 \
1776 : GET_MODE_SIZE (GET_MODE (X)))) \
1779 if (STACK_TOP_P (X)) \
1781 fputs ("st(0)", FILE); \
1787 if (! FP_REG_P (X)) fputs ("e", FILE); \
1789 fputs (hi_reg_name[REGNO (X)], FILE); \
1792 fputs (qi_reg_name[REGNO (X)], FILE); \
1795 fputs (qi_high_reg_name[REGNO (X)], FILE); \
1800 #define PRINT_OPERAND(FILE, X, CODE) \
1801 print_operand (FILE, X, CODE)
1803 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1804 print_operand_address (FILE, ADDR)
1806 /* Print the name of a register for based on its machine mode and number.
1807 This macro is used to print debugging output.
1808 This macro is different from PRINT_REG in that it may be used in
1809 programs that are not linked with aux-output.o. */
1811 #define DEBUG_PRINT_REG(X, CODE, FILE) \
1812 do { static char *hi_name[] = HI_REGISTER_NAMES; \
1813 static char *qi_name[] = QI_REGISTER_NAMES; \
1814 fprintf (FILE, "%d %s", REGNO (X), RP); \
1815 if (REGNO (X) == ARG_POINTER_REGNUM) \
1816 { fputs ("argp", FILE); break; } \
1817 if (STACK_TOP_P (X)) \
1818 { fputs ("st(0)", FILE); break; } \
1820 { fputs (hi_name[REGNO(X)], FILE); break; } \
1821 switch (GET_MODE_SIZE (GET_MODE (X))) \
1824 fputs ("e", FILE); \
1826 fputs (hi_name[REGNO (X)], FILE); \
1829 fputs (qi_name[REGNO (X)], FILE); \
1834 /* Output the prefix for an immediate operand, or for an offset operand. */
1835 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
1836 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
1838 /* Routines in libgcc that return floats must return them in an fp reg,
1839 just as other functions do which return such values.
1840 These macros make that happen. */
1842 #define FLOAT_VALUE_TYPE float
1843 #define INTIFY(FLOATVAL) FLOATVAL
1845 /* Nonzero if INSN magically clobbers register REGNO. */
1847 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1848 (FP_REGNO_P (REGNO) \
1849 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1852 /* a letter which is not needed by the normal asm syntax, which
1853 we can use for operand syntax in the extended asm */
1855 #define ASM_OPERAND_LETTER '#'
1857 #define RET return ""
1858 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
1860 /* Functions in i386.c */
1861 extern void override_options ();
1862 extern void order_regs_for_local_alloc ();
1863 extern int i386_valid_decl_attribute_p ();
1864 extern int i386_valid_type_attribute_p ();
1865 extern int i386_return_pops_args ();
1866 extern int i386_comp_type_attributes ();
1867 extern void init_cumulative_args ();
1868 extern void function_arg_advance ();
1869 extern struct rtx_def *function_arg ();
1870 extern int function_arg_partial_nregs ();
1871 extern void output_op_from_reg ();
1872 extern void output_to_reg ();
1873 extern char *singlemove_string ();
1874 extern char *output_move_double ();
1875 extern char *output_move_memory ();
1876 extern char *output_move_pushmem ();
1877 extern int standard_80387_constant_p ();
1878 extern char *output_move_const_single ();
1879 extern int symbolic_operand ();
1880 extern int call_insn_operand ();
1881 extern int expander_call_insn_operand ();
1882 extern int symbolic_reference_mentioned_p ();
1883 extern void emit_pic_move ();
1884 extern void function_prologue ();
1885 extern int simple_386_epilogue ();
1886 extern void function_epilogue ();
1887 extern int legitimate_address_p ();
1888 extern struct rtx_def *legitimize_pic_address ();
1889 extern struct rtx_def *legitimize_address ();
1890 extern void print_operand ();
1891 extern void print_operand_address ();
1892 extern void notice_update_cc ();
1893 extern void split_di ();
1894 extern int binary_387_op ();
1895 extern int shift_op ();
1896 extern int VOIDmode_compare_op ();
1897 extern char *output_387_binary_op ();
1898 extern char *output_fix_trunc ();
1899 extern char *output_float_compare ();
1900 extern char *output_fp_cc0_set ();
1901 extern void save_386_machine_status ();
1902 extern void restore_386_machine_status ();
1903 extern void clear_386_stack_locals ();
1904 extern struct rtx_def *assign_386_stack_local ();
1906 /* Variables in i386.c */
1907 extern char *i386_reg_alloc_order; /* register allocation order */
1908 extern char *i386_regparm_string; /* # registers to use to pass args */
1909 extern char *i386_align_loops_string; /* power of two alignment for loops */
1910 extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */
1911 extern char *i386_align_funcs_string; /* power of two alignment for functions */
1912 extern int i386_regparm; /* i386_regparm_string as a number */
1913 extern int i386_align_loops; /* power of two alignment for loops */
1914 extern int i386_align_jumps; /* power of two alignment for non-loop jumps */
1915 extern int i386_align_funcs; /* power of two alignment for functions */
1916 extern char *hi_reg_name[]; /* names for 16 bit regs */
1917 extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
1918 extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
1919 extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
1920 extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
1921 extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
1923 /* External variables used */
1924 extern int optimize; /* optimization level */
1925 extern int obey_regdecls; /* TRUE if stupid register allocation */
1927 /* External functions used */
1928 extern struct rtx_def *force_operand ();
projects / fw / sdcc / blob