2 set RTTC_RTMR [expr $AT91C_BASE_RTTC + 0x00]
3 set RTTC_RTAR [expr $AT91C_BASE_RTTC + 0x04]
4 set RTTC_RTVR [expr $AT91C_BASE_RTTC + 0x08]
5 set RTTC_RTSR [expr $AT91C_BASE_RTTC + 0x0c]
11 proc show_RTTC_RTMR_helper { NAME ADDR VAL } {
12 set rtpres [expr $VAL & 0x0ffff]
17 global AT91C_SLOWOSC_FREQ
18 set f [expr double($AT91C_SLOWOSC_FREQ) / double($rtpres)]
19 puts [format "\tPrescale value: 0x%04x (%5d) => %f Hz" $rtpres $rtpres $f]
20 if { $VAL & $BIT16 } {
21 puts "\tBit16 -> Alarm IRQ Enabled"
23 puts "\tBit16 -> Alarm IRQ Disabled"
25 if { $VAL & $BIT17 } {
26 puts "\tBit17 -> RTC Inc IRQ Enabled"
28 puts "\tBit17 -> RTC Inc IRQ Disabled"
30 # Bit 18 is write only.
33 proc show_RTTC_RTSR_helper { NAME ADDR VAL } {
36 puts "\tBit0 -> ALARM PENDING"
38 puts "\tBit0 -> alarm not pending"
41 puts "\tBit0 -> RTINC PENDING"
43 puts "\tBit0 -> rtinc not pending"
49 show_mmr32_reg RTTC_RTMR
50 show_mmr32_reg RTTC_RTAR
51 show_mmr32_reg RTTC_RTVR
52 show_mmr32_reg RTTC_RTSR