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   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 /***************************************************************************
   4  *   Copyright (C) 2013 Andes Technology                                   *
   5  *   Hsiangkai Wang <hkwang@andestech.com>                                 *
   6  ***************************************************************************/
   7
   8 #ifndef OPENOCD_TARGET_NDS32_DISASSEMBLER_H
   9 #define OPENOCD_TARGET_NDS32_DISASSEMBLER_H
  10
  11 #include <target/nds32.h>
  12
  13 enum nds32_instruction_type {
  14         NDS32_INSN_DATA_PROC = 0,
  15         NDS32_INSN_LOAD_STORE,
  16         NDS32_INSN_JUMP_BRANCH,
  17         NDS32_INSN_RESOURCE_ACCESS,
  18         NDS32_INSN_MISC,
  19 };
  20
  21 struct nds32_instruction {
  22         enum nds32_instruction_type type;
  23         char text[128];
  24         uint32_t opcode;
  25         uint8_t instruction_size;
  26         uint32_t access_start;
  27         uint32_t access_end;
  28
  29         struct {
  30                 uint8_t opc_6;
  31                 uint8_t rt;
  32                 uint8_t ra;
  33                 uint8_t rb;
  34                 uint8_t rd;
  35                 uint8_t sub_opc;
  36                 int32_t imm;
  37         } info;
  38
  39 };
  40
  41 int nds32_read_opcode(struct nds32 *nds32, uint32_t address, uint32_t *value);
  42 int nds32_evaluate_opcode(struct nds32 *nds32, uint32_t opcode, uint32_t address,
  43                 struct nds32_instruction *instruction);
  44
  45 #endif /* OPENOCD_TARGET_NDS32_DISASSEMBLER_H */