1 /***************************************************************************
2 * Copyright (C) 2008 by Spencer Oliver *
3 * spen@spen-soft.co.uk *
5 * Copyright (C) 2008 by David T.L. Wong *
7 * Copyright (C) 2009 by David N. Claffey <dnclaffey@gmail.com> *
9 * This program is free software; you can redistribute it and/or modify *
10 * it under the terms of the GNU General Public License as published by *
11 * the Free Software Foundation; either version 2 of the License, or *
12 * (at your option) any later version. *
14 * This program is distributed in the hope that it will be useful, *
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
17 * GNU General Public License for more details. *
19 * You should have received a copy of the GNU General Public License *
20 * along with this program; if not, write to the *
21 * Free Software Foundation, Inc., *
22 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
23 ***************************************************************************/
29 #include "mips_ejtag.h"
31 void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr)
35 tap = ejtag_info->tap;
38 if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr)
40 struct scan_field field;
43 field.num_bits = tap->ir_length;
45 buf_set_u32(t, 0, field.num_bits, new_instr);
46 field.in_value = NULL;
48 jtag_add_ir_scan(tap, &field, TAP_IDLE);
52 int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode)
54 struct scan_field field;
56 mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IDCODE);
59 field.out_value = NULL;
60 field.in_value = (void*)idcode;
62 jtag_add_dr_scan(ejtag_info->tap, 1, &field, TAP_IDLE);
65 if ((retval = jtag_execute_queue()) != ERROR_OK)
67 LOG_ERROR("register read failed");
73 static int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode)
75 struct scan_field field;
77 mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IMPCODE);
80 field.out_value = NULL;
81 field.in_value = (void*)impcode;
83 jtag_add_dr_scan(ejtag_info->tap, 1, &field, TAP_IDLE);
86 if ((retval = jtag_execute_queue()) != ERROR_OK)
88 LOG_ERROR("register read failed");
94 int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data)
97 tap = ejtag_info->tap;
100 struct scan_field field;
106 buf_set_u32(t, 0, field.num_bits, *data);
109 jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
111 if ((retval = jtag_execute_queue()) != ERROR_OK)
113 LOG_ERROR("register read failed");
117 *data = buf_get_u32(field.in_value, 0, 32);
124 int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data)
126 struct jtag_tap *tap;
127 tap = ejtag_info->tap;
130 struct scan_field field;
131 uint8_t t[4] = {0, 0, 0, 0}, r[4];
136 buf_set_u32(t, 0, field.num_bits, *data);
139 jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
141 if ((retval = jtag_execute_queue()) != ERROR_OK)
143 LOG_ERROR("register read failed");
147 *data = buf_get_u32(field.in_value, 0, 32);
154 static int mips_ejtag_step_enable(struct mips_ejtag *ejtag_info)
156 static const uint32_t code[] = {
157 MIPS32_MTC0(1,31,0), /* move $1 to COP0 DeSave */
158 MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
159 MIPS32_ORI(1,1,0x0100), /* set SSt bit in debug reg */
160 MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
162 MIPS32_MFC0(1,31,0), /* move COP0 DeSave to $1 */
165 mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
166 0, NULL, 0, NULL, 1);
171 static int mips_ejtag_step_disable(struct mips_ejtag *ejtag_info)
173 static const uint32_t code[] = {
174 MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
175 MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
176 MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
177 MIPS32_SW(1,0,15), /* sw $1,($15) */
178 MIPS32_SW(2,0,15), /* sw $2,($15) */
179 MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
180 MIPS32_LUI(2,0xFFFF), /* $2 = 0xfffffeff */
181 MIPS32_ORI(2,2,0xFEFF),
183 MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
187 MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
190 mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
191 0, NULL, 0, NULL, 1);
196 int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step)
199 return mips_ejtag_step_enable(ejtag_info);
200 return mips_ejtag_step_disable(ejtag_info);
203 int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info)
206 mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
208 /* set debug break bit */
209 ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_JTAGBRK;
210 mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
212 /* break bit will be cleared by hardware */
213 ejtag_ctrl = ejtag_info->ejtag_ctrl;
214 mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
215 LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32 "", ejtag_ctrl);
216 if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0)
218 LOG_ERROR("Failed to enter Debug Mode!");
225 int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
230 /* execute our dret instruction */
231 mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0);
236 int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg)
239 static const uint32_t code[] = {
240 MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
241 MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
242 MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
243 MIPS32_SW(1,0,15), /* sw $1,($15) */
244 MIPS32_SW(2,0,15), /* sw $2,($15) */
245 MIPS32_LUI(1,UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $1 = MIPS32_PRACC_PARAM_OUT */
246 MIPS32_ORI(1,1,LOWER16(MIPS32_PRACC_PARAM_OUT)),
247 MIPS32_MFC0(2,23,0), /* move COP0 Debug to $2 */
252 MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
255 mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
256 0, NULL, 1, debug_reg, 1);
261 int mips_ejtag_init(struct mips_ejtag *ejtag_info)
263 uint32_t ejtag_version;
266 retval = mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode);
267 if (retval != ERROR_OK)
269 LOG_DEBUG("impcode: 0x%8.8" PRIx32 "", ejtag_info->impcode);
271 /* get ejtag version */
272 ejtag_version = ((ejtag_info->impcode >> 29) & 0x07);
274 switch (ejtag_version)
277 LOG_DEBUG("EJTAG: Version 1 or 2.0 Detected");
280 LOG_DEBUG("EJTAG: Version 2.5 Detected");
283 LOG_DEBUG("EJTAG: Version 2.6 Detected");
286 LOG_DEBUG("EJTAG: Version 3.1 Detected");
289 LOG_DEBUG("EJTAG: Unknown Version Detected");
292 LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
293 ejtag_info->impcode & EJTAG_IMP_R3K ? " R3k" : " R4k",
294 ejtag_info->impcode & EJTAG_IMP_DINT ? " DINT" : "",
295 ejtag_info->impcode & (1 << 22) ? " ASID_8" : "",
296 ejtag_info->impcode & (1 << 21) ? " ASID_6" : "",
297 ejtag_info->impcode & EJTAG_IMP_MIPS16 ? " MIPS16" : "",
298 ejtag_info->impcode & EJTAG_IMP_NODMA ? " noDMA" : " DMA",
299 ejtag_info->impcode & EJTAG_DCR_MIPS64 ? " MIPS64" : " MIPS32");
301 if ((ejtag_info->impcode & EJTAG_IMP_NODMA) == 0)
302 LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
304 /* set initial state for ejtag control reg */
305 ejtag_info->ejtag_ctrl = EJTAG_CTRL_ROCC | EJTAG_CTRL_PRACC | EJTAG_CTRL_PROBEN | EJTAG_CTRL_SETDEV;
306 ejtag_info->fast_access_save = -1;
311 int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_t *data)
313 struct jtag_tap *tap;
314 tap = ejtag_info->tap;
317 struct scan_field fields[2];
319 uint8_t t[4] = {0, 0, 0, 0};
321 /* fastdata 1-bit register */
322 fields[0].num_bits = 1;
323 fields[0].out_value = &spracc;
324 fields[0].in_value = NULL;
326 /* processor access data register 32 bit */
327 fields[1].num_bits = 32;
328 fields[1].out_value = t;
332 fields[1].in_value = NULL;
333 buf_set_u32(t, 0, 32, *data);
337 fields[1].in_value = (uint8_t *) data;
340 jtag_add_dr_scan(tap, 2, fields, TAP_IDLE);