1 /***************************************************************************
2 * Copyright (C) 2008 by Spencer Oliver *
3 * spen@spen-soft.co.uk *
5 * Copyright (C) 2008 by David T.L. Wong *
7 * Copyright (C) 2009 by David N. Claffey <dnclaffey@gmail.com> *
9 * This program is free software; you can redistribute it and/or modify *
10 * it under the terms of the GNU General Public License as published by *
11 * the Free Software Foundation; either version 2 of the License, or *
12 * (at your option) any later version. *
14 * This program is distributed in the hope that it will be useful, *
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
17 * GNU General Public License for more details. *
19 * You should have received a copy of the GNU General Public License *
20 * along with this program; if not, write to the *
21 * Free Software Foundation, Inc., *
22 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
23 ***************************************************************************/
29 #include "mips_ejtag.h"
32 int mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr, void *delete_me_and_submit_patch)
36 tap = ejtag_info->tap;
40 if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr)
42 struct scan_field field;
46 field.num_bits = tap->ir_length;
48 buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
49 field.in_value = NULL;
51 jtag_add_ir_scan(1, &field, jtag_get_end_state());
57 int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode)
59 struct scan_field field;
61 jtag_set_end_state(TAP_IDLE);
63 mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IDCODE, NULL);
65 field.tap = ejtag_info->tap;
67 field.out_value = NULL;
68 field.in_value = (void*)idcode;
70 jtag_add_dr_scan(1, &field, jtag_get_end_state());
72 if (jtag_execute_queue() != ERROR_OK)
74 LOG_ERROR("register read failed");
80 int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode)
82 struct scan_field field;
84 jtag_set_end_state(TAP_IDLE);
86 mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IMPCODE, NULL);
88 field.tap = ejtag_info->tap;
90 field.out_value = NULL;
91 field.in_value = (void*)impcode;
93 jtag_add_dr_scan(1, &field, jtag_get_end_state());
95 if (jtag_execute_queue() != ERROR_OK)
97 LOG_ERROR("register read failed");
103 int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data)
105 struct jtag_tap *tap;
106 tap = ejtag_info->tap;
110 struct scan_field field;
117 buf_set_u32(field.out_value, 0, field.num_bits, *data);
120 jtag_add_dr_scan(1, &field, jtag_get_end_state());
122 if ((retval = jtag_execute_queue()) != ERROR_OK)
124 LOG_ERROR("register read failed");
128 *data = buf_get_u32(field.in_value, 0, 32);
135 int mips_ejtag_step_enable(struct mips_ejtag *ejtag_info)
138 MIPS32_MTC0(1,31,0), /* move $1 to COP0 DeSave */
139 MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
140 MIPS32_ORI(1,1,0x0100), /* set SSt bit in debug reg */
141 MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
143 MIPS32_MFC0(1,31,0), /* move COP0 DeSave to $1 */
146 mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
147 0, NULL, 0, NULL, 1);
151 int mips_ejtag_step_disable(struct mips_ejtag *ejtag_info)
154 MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
155 MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
156 MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
157 MIPS32_SW(1,0,15), /* sw $1,($15) */
158 MIPS32_SW(2,0,15), /* sw $2,($15) */
159 MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
160 MIPS32_LUI(2,0xFFFF), /* $2 = 0xfffffeff */
161 MIPS32_ORI(2,2,0xFEFF),
163 MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
167 MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
170 mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
171 0, NULL, 0, NULL, 1);
176 int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step)
179 return mips_ejtag_step_enable(ejtag_info);
180 return mips_ejtag_step_disable(ejtag_info);
183 int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info)
186 jtag_set_end_state(TAP_IDLE);
187 mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
189 /* set debug break bit */
190 ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_JTAGBRK;
191 mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
193 /* break bit will be cleared by hardware */
194 ejtag_ctrl = ejtag_info->ejtag_ctrl;
195 mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
196 LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32 "", ejtag_ctrl);
197 if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0)
198 LOG_DEBUG("Failed to enter Debug Mode!");
203 int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
208 /* execute our dret instruction */
209 mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0);
214 int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg)
218 MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
219 MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
220 MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
221 MIPS32_SW(1,0,15), /* sw $1,($15) */
222 MIPS32_SW(2,0,15), /* sw $2,($15) */
223 MIPS32_LUI(1,UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $1 = MIPS32_PRACC_PARAM_OUT */
224 MIPS32_ORI(1,1,LOWER16(MIPS32_PRACC_PARAM_OUT)),
225 MIPS32_MFC0(2,23,0), /* move COP0 Debug to $2 */
230 MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
233 mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
234 0, NULL, 1, debug_reg, 1);
239 int mips_ejtag_init(struct mips_ejtag *ejtag_info)
241 uint32_t ejtag_version;
243 mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode);
244 LOG_DEBUG("impcode: 0x%8.8" PRIx32 "", ejtag_info->impcode);
246 /* get ejtag version */
247 ejtag_version = ((ejtag_info->impcode >> 29) & 0x07);
249 switch (ejtag_version)
252 LOG_DEBUG("EJTAG: Version 1 or 2.0 Detected");
255 LOG_DEBUG("EJTAG: Version 2.5 Detected");
258 LOG_DEBUG("EJTAG: Version 2.6 Detected");
261 LOG_DEBUG("EJTAG: Version 3.1 Detected");
264 LOG_DEBUG("EJTAG: Unknown Version Detected");
267 LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
268 ejtag_info->impcode & (1 << 28) ? " R3k": " R4k",
269 ejtag_info->impcode & (1 << 24) ? " DINT": "",
270 ejtag_info->impcode & (1 << 22) ? " ASID_8": "",
271 ejtag_info->impcode & (1 << 21) ? " ASID_6": "",
272 ejtag_info->impcode & (1 << 16) ? " MIPS16": "",
273 ejtag_info->impcode & (1 << 14) ? " noDMA": " DMA",
274 ejtag_info->impcode & (1 << 0) ? " MIPS64": " MIPS32"
277 if ((ejtag_info->impcode & (1 << 14)) == 0)
278 LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
280 /* set initial state for ejtag control reg */
281 ejtag_info->ejtag_ctrl = EJTAG_CTRL_ROCC | EJTAG_CTRL_PRACC | EJTAG_CTRL_PROBEN | EJTAG_CTRL_SETDEV;
286 int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write, uint32_t *data)
288 struct jtag_tap *tap;
289 tap = ejtag_info->tap;
294 struct scan_field fields[2];
296 uint8_t t[4] = {0, 0, 0, 0};
298 /* fastdata 1-bit register */
300 fields[0].num_bits = 1;
301 fields[0].out_value = &spracc;
302 fields[0].in_value = NULL;
304 /* processor access data register 32 bit */
306 fields[1].num_bits = 32;
307 fields[1].out_value = t;
311 fields[1].in_value = NULL;
312 buf_set_u32(t, 0, 32, *data);
316 fields[1].in_value = (uint8_t *) data;
319 jtag_add_dr_scan(2, fields, jtag_get_end_state());