1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /***************************************************************************
4 * Copyright (C) 2008 by Spencer Oliver *
5 * spen@spen-soft.co.uk *
7 * Copyright (C) 2008 by David T.L. Wong *
9 * Copyright (C) 2011 by Drasko DRASKOVIC *
10 * drasko.draskovic@gmail.com *
11 ***************************************************************************/
13 #ifndef OPENOCD_TARGET_MIPS32_PRACC_H
14 #define OPENOCD_TARGET_MIPS32_PRACC_H
16 #include <target/mips32.h>
17 #include <target/mips_ejtag.h>
19 #define MIPS32_PRACC_FASTDATA_AREA 0xFF200000
20 #define MIPS32_PRACC_FASTDATA_SIZE 16
21 #define MIPS32_PRACC_BASE_ADDR 0xFF200000
22 #define MIPS32_PRACC_TEXT 0xFF200200
23 #define MIPS32_PRACC_PARAM_OUT 0xFF202000
25 #define PRACC_UPPER_BASE_ADDR (MIPS32_PRACC_BASE_ADDR >> 16)
26 #define PRACC_MAX_CODE (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_TEXT)
27 #define PRACC_MAX_INSTRUCTIONS (PRACC_MAX_CODE / 4)
28 #define PRACC_OUT_OFFSET (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_BASE_ADDR)
30 #define MIPS32_FASTDATA_HANDLER_SIZE 0x80
31 #define UPPER16(addr) ((addr) >> 16)
32 #define LOWER16(addr) ((addr) & 0xFFFF)
33 #define NEG16(v) (((~(v)) + 1) & 0xFFFF)
34 #define SWAP16(v) ((LOWER16(v) << 16) | (UPPER16(v)))
35 /*#define NEG18(v) (((~(v)) + 1) & 0x3FFFF)*/
37 #define PRACC_BLOCK 128 /* 1 Kbyte */
44 struct pracc_queue_info {
45 struct mips_ejtag *ejtag_info;
50 int max_code; /* max instructions with currently allocated memory */
51 struct pa_list *pracc_list; /* Code and store addresses at dmseg */
54 void pracc_queue_init(struct pracc_queue_info *ctx);
55 void pracc_add(struct pracc_queue_info *ctx, uint32_t addr, uint32_t instr);
56 void pracc_add_li32(struct pracc_queue_info *ctx, uint32_t reg_num, uint32_t data, bool optimize);
57 void pracc_queue_free(struct pracc_queue_info *ctx);
58 int mips32_pracc_queue_exec(struct mips_ejtag *ejtag_info,
59 struct pracc_queue_info *ctx, uint32_t *buf, bool check_last);
61 int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info,
62 uint32_t addr, int size, int count, void *buf);
63 int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info,
64 uint32_t addr, int size, int count, const void *buf);
65 int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_area *source,
66 int write_t, uint32_t addr, int count, uint32_t *buf);
68 int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs);
69 int mips32_pracc_write_regs(struct mips_ejtag *ejtag_info, uint32_t *regs);
71 int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ctx,
72 uint32_t *param_out, bool check_last);
77 * Simulates mfc0 ASM instruction (Move From C0),
78 * i.e. implements copro C0 Register read.
80 * @param[in] ejtag_info
81 * @param[in] val Storage to hold read value
82 * @param[in] cp0_reg Number of copro C0 register we want to read
83 * @param[in] cp0_sel Select for the given C0 register
85 * @return ERROR_OK on Success, ERROR_FAIL otherwise
87 int mips32_cp0_read(struct mips_ejtag *ejtag_info,
88 uint32_t *val, uint32_t cp0_reg, uint32_t cp0_sel);
93 * Simulates mtc0 ASM instruction (Move To C0),
94 * i.e. implements copro C0 Register read.
96 * @param[in] ejtag_info
97 * @param[in] val Value to be written
98 * @param[in] cp0_reg Number of copro C0 register we want to write to
99 * @param[in] cp0_sel Select for the given C0 register
101 * @return ERROR_OK on Success, ERROR_FAIL otherwise
103 int mips32_cp0_write(struct mips_ejtag *ejtag_info,
104 uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel);
106 static inline void pracc_swap16_array(struct mips_ejtag *ejtag_info, uint32_t *buf, int count)
108 if (ejtag_info->isa && ejtag_info->endianness)
109 for (int i = 0; i != count; i++)
110 buf[i] = SWAP16(buf[i]);
113 #endif /* OPENOCD_TARGET_MIPS32_PRACC_H */