flash/nor/at91samd: Use 32-bit register writes for ST-Link compat
[fw/openocd] / src / target / mips32_dmaacc.h
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2
3 /***************************************************************************
4  *   Copyright (C) 2008 by John McCarthy                                   *
5  *   jgmcc@magma.ca                                                        *
6  *                                                                         *
7  *   Copyright (C) 2008 by Spencer Oliver                                  *
8  *   spen@spen-soft.co.uk                                                  *
9  *                                                                         *
10  *   Copyright (C) 2008 by David T.L. Wong                                 *
11  ***************************************************************************/
12
13 #ifndef OPENOCD_TARGET_MIPS32_DMAACC_H
14 #define OPENOCD_TARGET_MIPS32_DMAACC_H
15
16 #include "mips_ejtag.h"
17
18 #define EJTAG_CTRL_DMA_BYTE                     0x00000000
19 #define EJTAG_CTRL_DMA_HALFWORD         0x00000080
20 #define EJTAG_CTRL_DMA_WORD                     0x00000100
21 #define EJTAG_CTRL_DMA_TRIPLEBYTE       0x00000180
22
23 #define RETRY_ATTEMPTS  0
24
25 int mips32_dmaacc_read_mem(struct mips_ejtag *ejtag_info,
26                 uint32_t addr, int size, int count, void *buf);
27 int mips32_dmaacc_write_mem(struct mips_ejtag *ejtag_info,
28                 uint32_t addr, int size, int count, const void *buf);
29
30 #endif /* OPENOCD_TARGET_MIPS32_DMAACC_H */