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   1 /***************************************************************************
   2  *   Copyright (C) 2005, 2006 by Dominic Rath                              *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
   6  *   oyvind.harboe@zylin.com                                               *
   7  *                                                                         *
   8  *   Copyright (C) 2008 by Spencer Oliver                                  *
   9  *   spen@spen-soft.co.uk                                                  *
  10  *                                                                         *
  11  *   This program is free software; you can redistribute it and/or modify  *
  12  *   it under the terms of the GNU General Public License as published by  *
  13  *   the Free Software Foundation; either version 2 of the License, or     *
  14  *   (at your option) any later version.                                   *
  15  *                                                                         *
  16  *   This program is distributed in the hope that it will be useful,       *
  17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  19  *   GNU General Public License for more details.                          *
  20  *                                                                         *
  21  *   You should have received a copy of the GNU General Public License     *
  22  *   along with this program; if not, write to the                         *
  23  *   Free Software Foundation, Inc.,                                       *
  24  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  25  ***************************************************************************/
  26 #ifndef EMBEDDED_ICE_H
  27 #define EMBEDDED_ICE_H
  28
  29 #include "target.h"
  30 #include "register.h"
  31 #include "arm_jtag.h"
  32 #include "arm7_9_common.h"
  33
  34 enum
  35 {
  36         EICE_DBG_CTRL = 0,
  37         EICE_DBG_STAT = 1,
  38         EICE_COMMS_CTRL = 2,
  39         EICE_COMMS_DATA = 3,
  40         EICE_W0_ADDR_VALUE = 4,
  41         EICE_W0_ADDR_MASK = 5,
  42         EICE_W0_DATA_VALUE  = 6,
  43         EICE_W0_DATA_MASK = 7,
  44         EICE_W0_CONTROL_VALUE = 8,
  45         EICE_W0_CONTROL_MASK = 9,
  46         EICE_W1_ADDR_VALUE = 10,
  47         EICE_W1_ADDR_MASK = 11,
  48         EICE_W1_DATA_VALUE = 12,
  49         EICE_W1_DATA_MASK = 13,
  50         EICE_W1_CONTROL_VALUE = 14,
  51         EICE_W1_CONTROL_MASK = 15,
  52         EICE_VEC_CATCH = 16
  53 };
  54
  55 enum
  56 {
  57         EICE_DBG_CONTROL_ICEDIS = 5,
  58         EICE_DBG_CONTROL_MONEN = 4,
  59         EICE_DBG_CONTROL_INTDIS = 2,
  60         EICE_DBG_CONTROL_DBGRQ = 1,
  61         EICE_DBG_CONTROL_DBGACK = 0,
  62 };
  63
  64 enum
  65 {
  66         EICE_DBG_STATUS_IJBIT = 5,
  67         EICE_DBG_STATUS_ITBIT = 4,
  68         EICE_DBG_STATUS_SYSCOMP = 3,
  69         EICE_DBG_STATUS_IFEN = 2,
  70         EICE_DBG_STATUS_DBGRQ = 1,
  71         EICE_DBG_STATUS_DBGACK = 0
  72 };
  73
  74 enum
  75 {
  76         EICE_W_CTRL_ENABLE = 0x100,
  77         EICE_W_CTRL_RANGE = 0x80,
  78         EICE_W_CTRL_CHAIN = 0x40,
  79         EICE_W_CTRL_EXTERN = 0x20,
  80         EICE_W_CTRL_nTRANS = 0x10,
  81         EICE_W_CTRL_nOPC = 0x8,
  82         EICE_W_CTRL_MAS = 0x6,
  83         EICE_W_CTRL_ITBIT = 0x2,
  84         EICE_W_CTRL_nRW = 0x1
  85 };
  86
  87 enum
  88 {
  89         EICE_COMM_CTRL_WBIT = 1,
  90         EICE_COMM_CTRL_RBIT = 0
  91 };
  92
  93 typedef struct embeddedice_reg_s
  94 {
  95         int addr;
  96         arm_jtag_t *jtag_info;
  97 } embeddedice_reg_t;
  98
  99 extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9);
 100 extern int embeddedice_setup(target_t *target);
 101 extern int embeddedice_read_reg(reg_t *reg);
 102 extern void embeddedice_write_reg(reg_t *reg, u32 value);
 103 extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
 104 extern void embeddedice_store_reg(reg_t *reg);
 105 extern void embeddedice_set_reg(reg_t *reg, u32 value);
 106 extern int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf);
 107 extern int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size);
 108 extern int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size);
 109 extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout);
 110
 111 /* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of
 112  * embeddedice_write_reg
 113  */
 114 static const int embeddedice_num_bits[]={32,5,1};
 115 static __inline__ void embeddedice_write_reg_inner( jtag_tap_t *tap, int reg_addr, u32 value)
 116 {
 117         u32 values[3];
 118
 119         values[0]=value;
 120         values[1]=reg_addr;
 121         values[2]=1;
 122
 123         jtag_add_dr_out( tap,
 124                         3,
 125                         embeddedice_num_bits,
 126                         values,
 127                         -1);
 128 }
 129
 130 void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count);
 131
 132
 133 #endif /* EMBEDDED_ICE_H */