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   1 /***************************************************************************
   2  *   Copyright (C) 2005, 2006 by Dominic Rath                              *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20 #ifndef EMBEDDED_ICE_H
  21 #define EMBEDDED_ICE_H
  22
  23 #include "target.h"
  24 #include "register.h"
  25 #include "arm_jtag.h"
  26 #include "arm7_9_common.h"
  27
  28 enum
  29 {
  30         EICE_DBG_CTRL = 0,
  31         EICE_DBG_STAT = 1,
  32         EICE_COMMS_CTRL = 2,
  33         EICE_COMMS_DATA = 3,
  34         EICE_W0_ADDR_VALUE = 4,
  35         EICE_W0_ADDR_MASK = 5,
  36         EICE_W0_DATA_VALUE  = 6,
  37         EICE_W0_DATA_MASK = 7,
  38         EICE_W0_CONTROL_VALUE = 8,
  39         EICE_W0_CONTROL_MASK = 9,
  40         EICE_W1_ADDR_VALUE = 10,
  41         EICE_W1_ADDR_MASK = 11,
  42         EICE_W1_DATA_VALUE = 12,
  43         EICE_W1_DATA_MASK = 13,
  44         EICE_W1_CONTROL_VALUE = 14,
  45         EICE_W1_CONTROL_MASK = 15,
  46         EICE_VEC_CATCH = 16
  47 };
  48
  49 enum
  50 {
  51         EICE_DBG_CONTROL_ICEDIS = 5,
  52         EICE_DBG_CONTROL_MONEN = 4,
  53         EICE_DBG_CONTROL_INTDIS = 2,
  54         EICE_DBG_CONTROL_DBGRQ = 1,
  55         EICE_DBG_CONTROL_DBGACK = 0,
  56 };
  57
  58 enum
  59 {
  60         EICE_DBG_STATUS_IJBIT = 5,
  61         EICE_DBG_STATUS_ITBIT = 4,
  62         EICE_DBG_STATUS_SYSCOMP = 3,
  63         EICE_DBG_STATUS_IFEN = 2,
  64         EICE_DBG_STATUS_DBGRQ = 1,
  65         EICE_DBG_STATUS_DBGACK = 0
  66 };
  67
  68 enum
  69 {
  70         EICE_W_CTRL_ENABLE = 0x100,
  71         EICE_W_CTRL_RANGE = 0x80,
  72         EICE_W_CTRL_CHAIN = 0x40,
  73         EICE_W_CTRL_EXTERN = 0x20,
  74         EICE_W_CTRL_nTRANS = 0x10,
  75         EICE_W_CTRL_nOPC = 0x8,
  76         EICE_W_CTRL_MAS = 0x6,
  77         EICE_W_CTRL_ITBIT = 0x2,
  78         EICE_W_CTRL_nRW = 0x1
  79 };
  80
  81 enum
  82 {
  83         EICE_COMM_CTRL_WBIT = 1,
  84         EICE_COMM_CTRL_RBIT = 0
  85 };
  86
  87 typedef struct embeddedice_reg_s
  88 {
  89         int addr;
  90         arm_jtag_t *jtag_info;
  91 } embeddedice_reg_t;
  92
  93 extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9);
  94 extern int embeddedice_read_reg(reg_t *reg);
  95 extern int embeddedice_write_reg(reg_t *reg, u32 value);
  96 extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
  97 extern int embeddedice_store_reg(reg_t *reg);
  98 extern int embeddedice_set_reg(reg_t *reg, u32 value);
  99 extern int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf);
 100 extern int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size);
 101 extern int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size);
 102 extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout);
 103
 104 /* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of
 105  * embeddedice_write_reg
 106  */
 107 static __inline__ void embeddedice_write_reg_inner(reg_t *reg, u32 value)
 108 {
 109         embeddedice_reg_t *ice_reg = reg->arch_info;
 110         u8 reg_addr = ice_reg->addr & 0x1f;
 111 #if 1
 112         u32 values[3];
 113         int num_bits[3];
 114
 115         values[0]=value;
 116         num_bits[0]=32;
 117         values[1]=reg_addr;
 118         num_bits[1]=5;
 119         values[2]=1;
 120         num_bits[2]=1;
 121
 122         jtag_add_dr_out(ice_reg->jtag_info->chain_pos,
 123                         3,
 124                         num_bits,
 125                         values,
 126                         -1);
 127 #else
 128         scan_field_t fields[3];
 129         u8 field0_out[4];
 130         u8 field1_out[1];
 131         u8 field2_out[1];
 132
 133         fields[0].device = ice_reg->jtag_info->chain_pos;
 134         fields[0].num_bits = 32;
 135         fields[0].out_value = field0_out;
 136         buf_set_u32(fields[0].out_value, 0, 32, value);
 137         fields[0].out_mask = NULL;
 138         fields[0].in_value = NULL;
 139         fields[0].in_check_value = NULL;
 140         fields[0].in_check_mask = NULL;
 141         fields[0].in_handler = NULL;
 142         fields[0].in_handler_priv = NULL;
 143
 144         fields[1].device = ice_reg->jtag_info->chain_pos;
 145         fields[1].num_bits = 5;
 146         fields[1].out_value = field1_out;
 147         buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
 148         fields[1].out_mask = NULL;
 149         fields[1].in_value = NULL;
 150         fields[1].in_check_value = NULL;
 151         fields[1].in_check_mask = NULL;
 152         fields[1].in_handler = NULL;
 153         fields[1].in_handler_priv = NULL;
 154
 155         fields[2].device = ice_reg->jtag_info->chain_pos;
 156         fields[2].num_bits = 1;
 157         fields[2].out_value = field2_out;
 158         buf_set_u32(fields[2].out_value, 0, 1, 1);
 159         fields[2].out_mask = NULL;
 160         fields[2].in_value = NULL;
 161         fields[2].in_check_value = NULL;
 162         fields[2].in_check_mask = NULL;
 163         fields[2].in_handler = NULL;
 164         fields[2].in_handler_priv = NULL;
 165
 166         jtag_add_dr_scan(3, fields, -1);
 167
 168 #endif
 169 }
 170
 171
 172 #endif /* EMBEDDED_ICE_H */