target: add generic Xtensa LX support
[fw/openocd] / src / target / avr32_regs.c
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2
3 /***************************************************************************
4  *   Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com>       *
5  ***************************************************************************/
6
7 #ifdef HAVE_CONFIG_H
8 #include "config.h"
9 #endif
10
11 #include "target.h"
12 #include "jtag/jtag.h"
13 #include "avr32_jtag.h"
14 #include "avr32_regs.h"
15
16 static int avr32_jtag_read_reg(struct avr32_jtag *jtag_info, int reg,
17                 uint32_t *val)
18 {
19         int retval;
20         uint32_t dcsr;
21
22         retval = avr32_jtag_exec(jtag_info, MTDR(AVR32_OCDREG_DCCPU, reg));
23         if (retval != ERROR_OK)
24                 return retval;
25
26         do {
27                 retval = avr32_jtag_nexus_read(jtag_info,
28                         AVR32_OCDREG_DCSR, &dcsr);
29
30                 if (retval != ERROR_OK)
31                         return retval;
32         } while (!(dcsr & OCDREG_DCSR_CPUD));
33
34         retval = avr32_jtag_nexus_read(jtag_info,
35                         AVR32_OCDREG_DCCPU, val);
36
37         return retval;
38 }
39
40 static int avr32_jtag_write_reg(struct avr32_jtag *jtag_info, int reg,
41                 uint32_t val)
42 {
43         int retval;
44         uint32_t dcsr;
45
46         /* Restore Status reg */
47         retval = avr32_jtag_nexus_write(jtag_info,
48                                 AVR32_OCDREG_DCEMU, val);
49         if (retval != ERROR_OK)
50                 return retval;
51
52         retval = avr32_jtag_exec(jtag_info, MFDR(reg, AVR32_OCDREG_DCEMU));
53         if (retval != ERROR_OK)
54                 return retval;
55         do {
56                 retval = avr32_jtag_nexus_read(jtag_info,
57                         AVR32_OCDREG_DCSR, &dcsr);
58         } while (!(dcsr & OCDREG_DCSR_EMUD) && (retval == ERROR_OK));
59
60         return retval;
61 }
62
63
64
65 int avr32_jtag_read_regs(struct avr32_jtag *jtag_info, uint32_t *regs)
66 {
67         int i, retval;
68
69         /* read core registers */
70         for (i = 0; i < AVR32NUMCOREREGS - 1; i++)
71                 avr32_jtag_read_reg(jtag_info, i, regs + i);
72
73         /* read status register */
74         retval = avr32_jtag_exec(jtag_info, MFSR(0, 0));
75         if (retval != ERROR_OK)
76                 return retval;
77
78         retval = avr32_jtag_read_reg(jtag_info, 0, regs + AVR32_REG_SR);
79
80         return retval;
81 }
82
83 int avr32_jtag_write_regs(struct avr32_jtag *jtag_info, uint32_t *regs)
84 {
85         int i, retval;
86
87         retval = avr32_jtag_write_reg(jtag_info, 0, regs[AVR32_REG_SR]);
88         if (retval != ERROR_OK)
89                 return retval;
90
91         /* Restore Status reg */
92         retval = avr32_jtag_exec(jtag_info, MTSR(0, 0));
93         if (retval != ERROR_OK)
94                 return retval;
95
96         /*
97          * And now the rest of registers
98          */
99         for (i = 0; i < AVR32NUMCOREREGS - 1; i++)
100                 avr32_jtag_write_reg(jtag_info, i, regs[i]);
101
102         return ERROR_OK;
103 }