fb1880464f21a32740bab1490668eb68cb11ffe8
[fw/openocd] / src / target / armv8_cache.c
1 /***************************************************************************
2  *   Copyright (C) 2016 by Matthias Welwarsky                              *
3  *   matthias.welwarsky@sysgo.com                                          *
4  *                                                                         *
5  *   This program is free software; you can redistribute it and/or modify  *
6  *   it under the terms of the GNU General Public License as published by  *
7  *   the Free Software Foundation; either version 2 of the License, or     *
8  *   (at your option) any later version.                                   *
9  *                                                                         *
10  *   This program is distributed in the hope that it will be useful,       *
11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
13  *   GNU General Public License for more details.                          *
14  *                                                                         *
15  *   You should have received a copy of the GNU General Public License     *
16  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
17  ***************************************************************************/
18
19 #ifdef HAVE_CONFIG_H
20 #include "config.h"
21 #endif
22
23 #include "armv8_cache.h"
24 #include "armv8_dpm.h"
25 #include "armv8_opcodes.h"
26
27 static int armv8_d_cache_sanity_check(struct armv8_common *armv8)
28 {
29         struct armv8_cache_common *armv8_cache = &armv8->armv8_mmu.armv8_cache;
30
31         if (armv8_cache->d_u_cache_enabled)
32                 return ERROR_OK;
33
34         return ERROR_TARGET_INVALID;
35 }
36
37 static int armv8_i_cache_sanity_check(struct armv8_common *armv8)
38 {
39         struct armv8_cache_common *armv8_cache = &armv8->armv8_mmu.armv8_cache;
40
41         if (armv8_cache->i_cache_enabled)
42                 return ERROR_OK;
43
44         return ERROR_TARGET_INVALID;
45 }
46
47 int armv8_cache_d_inner_flush_virt(struct armv8_common *armv8, target_addr_t va, size_t size)
48 {
49         struct arm_dpm *dpm = armv8->arm.dpm;
50         struct armv8_cache_common *armv8_cache = &armv8->armv8_mmu.armv8_cache;
51         uint64_t linelen = armv8_cache->d_u_size.linelen;
52         target_addr_t va_line, va_end;
53         int retval;
54
55         retval = armv8_d_cache_sanity_check(armv8);
56         if (retval != ERROR_OK)
57                 return retval;
58
59         retval = dpm->prepare(dpm);
60         if (retval != ERROR_OK)
61                 goto done;
62
63         va_line = va & (-linelen);
64         va_end = va + size;
65
66         while (va_line < va_end) {
67                 /* DC CIVAC */
68                 /* Aarch32: DCCIMVAC: ARMV4_5_MCR(15, 0, 0, 7, 14, 1) */
69                 retval = dpm->instr_write_data_r0_64(dpm,
70                                 ARMV8_SYS(SYSTEM_DCCIVAC, 0), va_line);
71                 if (retval != ERROR_OK)
72                         goto done;
73                 va_line += linelen;
74         }
75
76         dpm->finish(dpm);
77         return retval;
78
79 done:
80         LOG_ERROR("d-cache invalidate failed");
81         dpm->finish(dpm);
82
83         return retval;
84 }
85
86 int armv8_cache_i_inner_inval_virt(struct armv8_common *armv8, target_addr_t va, size_t size)
87 {
88         struct arm_dpm *dpm = armv8->arm.dpm;
89         struct armv8_cache_common *armv8_cache = &armv8->armv8_mmu.armv8_cache;
90         uint64_t linelen = armv8_cache->i_size.linelen;
91         target_addr_t va_line, va_end;
92         int retval;
93
94         retval = armv8_i_cache_sanity_check(armv8);
95         if (retval != ERROR_OK)
96                 return retval;
97
98         retval = dpm->prepare(dpm);
99         if (retval != ERROR_OK)
100                 goto done;
101
102         va_line = va & (-linelen);
103         va_end = va + size;
104
105         while (va_line < va_end) {
106                 /* IC IVAU - Invalidate instruction cache by VA to PoU. */
107                 retval = dpm->instr_write_data_r0_64(dpm,
108                                 ARMV8_SYS(SYSTEM_ICIVAU, 0), va_line);
109                 if (retval != ERROR_OK)
110                         goto done;
111                 va_line += linelen;
112         }
113
114         dpm->finish(dpm);
115         return retval;
116
117 done:
118         LOG_ERROR("d-cache invalidate failed");
119         dpm->finish(dpm);
120
121         return retval;
122 }