armv7m: do not access FPU registers when not present
[fw/openocd] / src / target / armv7m.h
1 /***************************************************************************
2  *   Copyright (C) 2005 by Dominic Rath                                    *
3  *   Dominic.Rath@gmx.de                                                   *
4  *                                                                         *
5  *   Copyright (C) 2006 by Magnus Lundin                                   *
6  *   lundin@mlu.mine.nu                                                    *
7  *                                                                         *
8  *   Copyright (C) 2008 by Spencer Oliver                                  *
9  *   spen@spen-soft.co.uk                                                  *
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26
27 #ifndef ARMV7M_COMMON_H
28 #define ARMV7M_COMMON_H
29
30 #include "arm_adi_v5.h"
31 #include "arm.h"
32
33 extern const int armv7m_psp_reg_map[];
34 extern const int armv7m_msp_reg_map[];
35
36 const char *armv7m_exception_string(int number);
37
38 /* offsets into armv7m core register cache */
39 enum {
40         /* for convenience, the first set of indices match
41          * the Cortex-M3/-M4 DCRSR selectors
42          */
43         ARMV7M_R0,
44         ARMV7M_R1,
45         ARMV7M_R2,
46         ARMV7M_R3,
47
48         ARMV7M_R4,
49         ARMV7M_R5,
50         ARMV7M_R6,
51         ARMV7M_R7,
52
53         ARMV7M_R8,
54         ARMV7M_R9,
55         ARMV7M_R10,
56         ARMV7M_R11,
57
58         ARMV7M_R12,
59         ARMV7M_R13,
60         ARMV7M_R14,
61         ARMV7M_PC = 15,
62
63         ARMV7M_xPSR = 16,
64         ARMV7M_MSP,
65         ARMV7M_PSP,
66
67         /* this next set of indices is arbitrary */
68         ARMV7M_PRIMASK,
69         ARMV7M_BASEPRI,
70         ARMV7M_FAULTMASK,
71         ARMV7M_CONTROL,
72
73         /* 32bit Floating-point registers */
74         ARMV7M_S0,
75         ARMV7M_S1,
76         ARMV7M_S2,
77         ARMV7M_S3,
78         ARMV7M_S4,
79         ARMV7M_S5,
80         ARMV7M_S6,
81         ARMV7M_S7,
82         ARMV7M_S8,
83         ARMV7M_S9,
84         ARMV7M_S10,
85         ARMV7M_S11,
86         ARMV7M_S12,
87         ARMV7M_S13,
88         ARMV7M_S14,
89         ARMV7M_S15,
90         ARMV7M_S16,
91         ARMV7M_S17,
92         ARMV7M_S18,
93         ARMV7M_S19,
94         ARMV7M_S20,
95         ARMV7M_S21,
96         ARMV7M_S22,
97         ARMV7M_S23,
98         ARMV7M_S24,
99         ARMV7M_S25,
100         ARMV7M_S26,
101         ARMV7M_S27,
102         ARMV7M_S28,
103         ARMV7M_S29,
104         ARMV7M_S30,
105         ARMV7M_S31,
106
107         /* 64bit Floating-point registers */
108         ARMV7M_D0,
109         ARMV7M_D1,
110         ARMV7M_D2,
111         ARMV7M_D3,
112         ARMV7M_D4,
113         ARMV7M_D5,
114         ARMV7M_D6,
115         ARMV7M_D7,
116         ARMV7M_D8,
117         ARMV7M_D9,
118         ARMV7M_D10,
119         ARMV7M_D11,
120         ARMV7M_D12,
121         ARMV7M_D13,
122         ARMV7M_D14,
123         ARMV7M_D15,
124
125         /* Floating-point status registers */
126         ARMV7M_FPSID,
127         ARMV7M_FPSCR,
128         ARMV7M_FPEXC,
129
130         ARMV7M_LAST_REG,
131 };
132
133 enum {
134         FP_NONE = 0,
135         FPv4_SP,
136 };
137
138 #define ARMV7M_NUM_CORE_REGS (ARMV7M_xPSR + 1)
139 #define ARMV7M_NUM_CORE_REGS_NOFP (ARMV7M_NUM_CORE_REGS + 6)
140
141 #define ARMV7M_COMMON_MAGIC 0x2A452A45
142
143 struct armv7m_common {
144         struct arm      arm;
145
146         int common_magic;
147         int exception_number;
148         struct adiv5_dap dap;
149
150         int fp_feature;
151         uint32_t demcr;
152
153         /* stlink is a high level adapter, does not support all functions */
154         bool stlink;
155
156         /* Direct processor core register read and writes */
157         int (*load_core_reg_u32)(struct target *target, uint32_t num, uint32_t *value);
158         int (*store_core_reg_u32)(struct target *target, uint32_t num, uint32_t value);
159
160         int (*examine_debug_reason)(struct target *target);
161         int (*post_debug_entry)(struct target *target);
162
163         void (*pre_restore_context)(struct target *target);
164 };
165
166 static inline struct armv7m_common *
167 target_to_armv7m(struct target *target)
168 {
169         return container_of(target->arch_info, struct armv7m_common, arm);
170 }
171
172 static inline bool is_armv7m(struct armv7m_common *armv7m)
173 {
174         return armv7m->common_magic == ARMV7M_COMMON_MAGIC;
175 }
176
177 struct armv7m_algorithm {
178         int common_magic;
179
180         enum arm_mode core_mode;
181
182         uint32_t context[ARMV7M_LAST_REG]; /* ARMV7M_NUM_REGS */
183 };
184
185 struct reg_cache *armv7m_build_reg_cache(struct target *target);
186 enum armv7m_mode armv7m_number_to_mode(int number);
187 int armv7m_mode_to_number(enum armv7m_mode mode);
188
189 int armv7m_arch_state(struct target *target);
190 int armv7m_get_gdb_reg_list(struct target *target,
191                 struct reg **reg_list[], int *reg_list_size,
192                 enum target_register_class reg_class);
193
194 int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m);
195
196 int armv7m_run_algorithm(struct target *target,
197                 int num_mem_params, struct mem_param *mem_params,
198                 int num_reg_params, struct reg_param *reg_params,
199                 uint32_t entry_point, uint32_t exit_point,
200                 int timeout_ms, void *arch_info);
201
202 int armv7m_start_algorithm(struct target *target,
203                 int num_mem_params, struct mem_param *mem_params,
204                 int num_reg_params, struct reg_param *reg_params,
205                 uint32_t entry_point, uint32_t exit_point,
206                 void *arch_info);
207
208 int armv7m_wait_algorithm(struct target *target,
209                 int num_mem_params, struct mem_param *mem_params,
210                 int num_reg_params, struct reg_param *reg_params,
211                 uint32_t exit_point, int timeout_ms,
212                 void *arch_info);
213
214 int armv7m_invalidate_core_regs(struct target *target);
215
216 int armv7m_restore_context(struct target *target);
217
218 int armv7m_checksum_memory(struct target *target,
219                 uint32_t address, uint32_t count, uint32_t *checksum);
220 int armv7m_blank_check_memory(struct target *target,
221                 uint32_t address, uint32_t count, uint32_t *blank);
222
223 int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
224
225 extern const struct command_registration armv7m_command_handlers[];
226
227 #endif /* ARMV7M_H */