1 /***************************************************************************
2 * Copyright (C) 2015 by Oleksij Rempel *
3 * linux@rempel-privat.de *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
17 ***************************************************************************/
23 #include "jtag/interface.h"
26 #include "armv7a_cache.h"
27 #include <helper/time_support.h>
29 #include "target_type.h"
32 static int arm7a_l2x_sanity_check(struct target *target)
34 struct armv7a_common *armv7a = target_to_armv7a(target);
35 struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
36 (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
38 if (target->state != TARGET_HALTED) {
39 LOG_ERROR("%s: target not halted", __func__);
40 return ERROR_TARGET_NOT_HALTED;
43 if (!l2x_cache || !l2x_cache->base) {
44 LOG_DEBUG("l2x is not configured!");
51 * clean and invalidate complete l2x cache
53 int arm7a_l2x_flush_all_data(struct target *target)
55 struct armv7a_common *armv7a = target_to_armv7a(target);
56 struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
57 (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
61 retval = arm7a_l2x_sanity_check(target);
65 l2_way_val = (1 << l2x_cache->way) - 1;
67 return target_write_phys_u32(target,
68 l2x_cache->base + L2X0_CLEAN_INV_WAY,
72 int armv7a_l2x_cache_flush_virt(struct target *target, target_addr_t virt,
75 struct armv7a_common *armv7a = target_to_armv7a(target);
76 struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
77 (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
78 /* FIXME: different controllers have different linelen? */
79 uint32_t i, linelen = 32;
82 retval = arm7a_l2x_sanity_check(target);
86 for (i = 0; i < size; i += linelen) {
87 target_addr_t pa, offs = virt + i;
89 /* FIXME: use less verbose virt2phys? */
90 retval = target->type->virt2phys(target, offs, &pa);
91 if (retval != ERROR_OK)
94 retval = target_write_phys_u32(target,
95 l2x_cache->base + L2X0_CLEAN_INV_LINE_PA, pa);
96 if (retval != ERROR_OK)
102 LOG_ERROR("d-cache invalidate failed");
107 static int armv7a_l2x_cache_inval_virt(struct target *target, target_addr_t virt,
110 struct armv7a_common *armv7a = target_to_armv7a(target);
111 struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
112 (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
113 /* FIXME: different controllers have different linelen */
114 uint32_t i, linelen = 32;
117 retval = arm7a_l2x_sanity_check(target);
121 for (i = 0; i < size; i += linelen) {
122 target_addr_t pa, offs = virt + i;
124 /* FIXME: use less verbose virt2phys? */
125 retval = target->type->virt2phys(target, offs, &pa);
126 if (retval != ERROR_OK)
129 retval = target_write_phys_u32(target,
130 l2x_cache->base + L2X0_INV_LINE_PA, pa);
131 if (retval != ERROR_OK)
137 LOG_ERROR("d-cache invalidate failed");
142 static int armv7a_l2x_cache_clean_virt(struct target *target, target_addr_t virt,
145 struct armv7a_common *armv7a = target_to_armv7a(target);
146 struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
147 (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
148 /* FIXME: different controllers have different linelen */
149 uint32_t i, linelen = 32;
152 retval = arm7a_l2x_sanity_check(target);
156 for (i = 0; i < size; i += linelen) {
157 target_addr_t pa, offs = virt + i;
159 /* FIXME: use less verbose virt2phys? */
160 retval = target->type->virt2phys(target, offs, &pa);
161 if (retval != ERROR_OK)
164 retval = target_write_phys_u32(target,
165 l2x_cache->base + L2X0_CLEAN_LINE_PA, pa);
166 if (retval != ERROR_OK)
172 LOG_ERROR("d-cache invalidate failed");
177 static int arm7a_handle_l2x_cache_info_command(struct command_invocation *cmd,
178 struct armv7a_cache_common *armv7a_cache)
180 struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
181 (armv7a_cache->outer_cache);
183 if (armv7a_cache->info == -1) {
184 command_print(cmd, "cache not yet identified");
189 "L2 unified cache Base Address 0x%" PRIx32 ", %" PRIu32 " ways",
190 l2x_cache->base, l2x_cache->way);
195 static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t way)
197 struct armv7a_l2x_cache *l2x_cache;
198 struct target_list *head;
200 struct armv7a_common *armv7a = target_to_armv7a(target);
201 if (armv7a->armv7a_mmu.armv7a_cache.outer_cache) {
202 LOG_ERROR("L2 cache was already initialised\n");
206 l2x_cache = calloc(1, sizeof(struct armv7a_l2x_cache));
207 l2x_cache->base = base;
208 l2x_cache->way = way;
209 armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
211 /* initialize all targets in this cluster (smp target)
212 * l2 cache must be configured after smp declaration */
213 foreach_smp_target(head, target->smp_targets) {
214 struct target *curr = head->target;
215 if (curr != target) {
216 armv7a = target_to_armv7a(curr);
217 if (armv7a->armv7a_mmu.armv7a_cache.outer_cache) {
218 LOG_ERROR("smp target : cache l2 already initialized\n");
221 armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
227 COMMAND_HANDLER(arm7a_l2x_cache_info_command)
229 struct target *target = get_current_target(CMD_CTX);
230 struct armv7a_common *armv7a = target_to_armv7a(target);
233 retval = arm7a_l2x_sanity_check(target);
237 return arm7a_handle_l2x_cache_info_command(CMD,
238 &armv7a->armv7a_mmu.armv7a_cache);
241 COMMAND_HANDLER(arm7a_l2x_cache_flush_all_command)
243 struct target *target = get_current_target(CMD_CTX);
245 return arm7a_l2x_flush_all_data(target);
248 COMMAND_HANDLER(arm7a_l2x_cache_flush_virt_cmd)
250 struct target *target = get_current_target(CMD_CTX);
254 if (CMD_ARGC == 0 || CMD_ARGC > 2)
255 return ERROR_COMMAND_SYNTAX_ERROR;
258 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], size);
262 COMMAND_PARSE_ADDRESS(CMD_ARGV[0], virt);
264 return armv7a_l2x_cache_flush_virt(target, virt, size);
267 COMMAND_HANDLER(arm7a_l2x_cache_inval_virt_cmd)
269 struct target *target = get_current_target(CMD_CTX);
273 if (CMD_ARGC == 0 || CMD_ARGC > 2)
274 return ERROR_COMMAND_SYNTAX_ERROR;
277 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], size);
281 COMMAND_PARSE_ADDRESS(CMD_ARGV[0], virt);
283 return armv7a_l2x_cache_inval_virt(target, virt, size);
286 COMMAND_HANDLER(arm7a_l2x_cache_clean_virt_cmd)
288 struct target *target = get_current_target(CMD_CTX);
292 if (CMD_ARGC == 0 || CMD_ARGC > 2)
293 return ERROR_COMMAND_SYNTAX_ERROR;
296 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], size);
300 COMMAND_PARSE_ADDRESS(CMD_ARGV[0], virt);
302 return armv7a_l2x_cache_clean_virt(target, virt, size);
305 /* FIXME: should we configure way size? or controller type? */
306 COMMAND_HANDLER(armv7a_l2x_cache_conf_cmd)
308 struct target *target = get_current_target(CMD_CTX);
312 return ERROR_COMMAND_SYNTAX_ERROR;
314 /* command_print(CMD, "%s %s", CMD_ARGV[0], CMD_ARGV[1]); */
315 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], base);
316 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], way);
318 /* AP address is in bits 31:24 of DP_SELECT */
319 return armv7a_l2x_cache_init(target, base, way);
322 static const struct command_registration arm7a_l2x_cache_commands[] = {
325 .handler = armv7a_l2x_cache_conf_cmd,
327 .help = "configure l2x cache",
328 .usage = "<base_addr> <number_of_way>",
332 .handler = arm7a_l2x_cache_info_command,
334 .help = "print cache related information",
339 .handler = arm7a_l2x_cache_flush_all_command,
341 .help = "flush complete l2x cache",
346 .handler = arm7a_l2x_cache_flush_virt_cmd,
348 .help = "flush (clean and invalidate) l2x cache by virtual address offset and range size",
349 .usage = "<virt_addr> [size]",
353 .handler = arm7a_l2x_cache_inval_virt_cmd,
355 .help = "invalidate l2x cache by virtual address offset and range size",
356 .usage = "<virt_addr> [size]",
360 .handler = arm7a_l2x_cache_clean_virt_cmd,
362 .help = "clean l2x cache by virtual address address offset and range size",
363 .usage = "<virt_addr> [size]",
365 COMMAND_REGISTRATION_DONE
368 const struct command_registration arm7a_l2x_cache_command_handler[] = {
372 .help = "l2x cache command group",
374 .chain = arm7a_l2x_cache_commands,
376 COMMAND_REGISTRATION_DONE