1 /***************************************************************************
2 * Copyright (C) 2009 by Marvell Technology Group Ltd. *
3 * Written by Nicolas Pitre <nico@marvell.com> *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
23 * Hold ARM semihosting support.
25 * Semihosting enables code running on an ARM target to use the I/O
26 * facilities on the host computer. The target application must be linked
27 * against a library that forwards operation requests by using the SVC
28 * instruction trapped at the Supervisor Call vector by the debugger.
29 * Details can be found in chapter 8 of DUI0203I_rvct_developer_guide.pdf
39 #include "arm_semihosting.h"
40 #include <helper/binarybuffer.h>
41 #include <helper/log.h>
44 static int do_semihosting(struct target *target)
46 struct arm *armv4_5 = target_to_armv4_5(target);
47 uint32_t r0 = buf_get_u32(armv4_5->core_cache->reg_list[0].value, 0, 32);
48 uint32_t r1 = buf_get_u32(armv4_5->core_cache->reg_list[1].value, 0, 32);
49 uint32_t lr = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, ARMV4_5_MODE_SVC, 14).value, 0, 32);
50 uint32_t spsr = buf_get_u32(armv4_5->spsr->value, 0, 32);;
55 * TODO: lots of security issues are not considered yet, such as:
56 * - no validation on target provided file descriptors
57 * - no safety checks on opened/deleted/renamed file paths
58 * Beware the target app you use this support with.
61 case 0x01: /* SYS_OPEN */
62 retval = target_read_memory(target, r1, 4, 3, params);
63 if (retval != ERROR_OK)
66 uint32_t a = target_buffer_get_u32(target, params+0);
67 uint32_t m = target_buffer_get_u32(target, params+4);
68 uint32_t l = target_buffer_get_u32(target, params+8);
69 if (l <= 255 && m <= 11) {
72 retval = target_read_memory(target, a, 1, l, fn);
73 if (retval != ERROR_OK)
83 mode |= O_CREAT|O_APPEND;
85 mode |= O_CREAT|O_TRUNC;
86 if (strcmp((char *)fn, ":tt") == 0) {
92 result = open((char *)fn, mode);
93 armv4_5->semihosting_errno = errno;
96 armv4_5->semihosting_errno = EINVAL;
101 case 0x02: /* SYS_CLOSE */
102 retval = target_read_memory(target, r1, 4, 1, params);
103 if (retval != ERROR_OK)
106 int fd = target_buffer_get_u32(target, params+0);
108 armv4_5->semihosting_errno = errno;
112 case 0x03: /* SYS_WRITEC */
115 retval = target_read_memory(target, r1, 1, 1, &c);
116 if (retval != ERROR_OK)
123 case 0x04: /* SYS_WRITE0 */
126 retval = target_read_memory(target, r1, 1, 1, &c);
127 if (retval != ERROR_OK)
136 case 0x05: /* SYS_WRITE */
137 retval = target_read_memory(target, r1, 4, 3, params);
138 if (retval != ERROR_OK)
141 int fd = target_buffer_get_u32(target, params+0);
142 uint32_t a = target_buffer_get_u32(target, params+4);
143 size_t l = target_buffer_get_u32(target, params+8);
144 uint8_t *buf = malloc(l);
147 armv4_5->semihosting_errno = ENOMEM;
149 retval = target_read_buffer(target, a, l, buf);
150 if (retval != ERROR_OK) {
154 result = write(fd, buf, l);
155 armv4_5->semihosting_errno = errno;
163 case 0x06: /* SYS_READ */
164 retval = target_read_memory(target, r1, 4, 3, params);
165 if (retval != ERROR_OK)
168 int fd = target_buffer_get_u32(target, params+0);
169 uint32_t a = target_buffer_get_u32(target, params+4);
170 ssize_t l = target_buffer_get_u32(target, params+8);
171 uint8_t *buf = malloc(l);
174 armv4_5->semihosting_errno = ENOMEM;
176 result = read(fd, buf, l);
177 armv4_5->semihosting_errno = errno;
179 retval = target_write_buffer(target, a, result, buf);
180 if (retval != ERROR_OK) {
191 case 0x07: /* SYS_READC */
195 case 0x08: /* SYS_ISERROR */
196 retval = target_read_memory(target, r1, 4, 1, params);
197 if (retval != ERROR_OK)
199 result = (target_buffer_get_u32(target, params+0) != 0);
202 case 0x09: /* SYS_ISTTY */
203 retval = target_read_memory(target, r1, 4, 1, params);
204 if (retval != ERROR_OK)
206 result = isatty(target_buffer_get_u32(target, params+0));
209 case 0x0a: /* SYS_SEEK */
210 retval = target_read_memory(target, r1, 4, 2, params);
211 if (retval != ERROR_OK)
214 int fd = target_buffer_get_u32(target, params+0);
215 off_t pos = target_buffer_get_u32(target, params+4);
216 result = lseek(fd, pos, SEEK_SET);
217 armv4_5->semihosting_errno = errno;
223 case 0x0c: /* SYS_FLEN */
224 retval = target_read_memory(target, r1, 4, 1, params);
225 if (retval != ERROR_OK)
228 int fd = target_buffer_get_u32(target, params+0);
229 off_t cur = lseek(fd, 0, SEEK_CUR);
230 if (cur == (off_t)-1) {
231 armv4_5->semihosting_errno = errno;
235 result = lseek(fd, 0, SEEK_END);
236 armv4_5->semihosting_errno = errno;
237 if (lseek(fd, cur, SEEK_SET) == (off_t)-1) {
238 armv4_5->semihosting_errno = errno;
244 case 0x0e: /* SYS_REMOVE */
245 retval = target_read_memory(target, r1, 4, 2, params);
246 if (retval != ERROR_OK)
249 uint32_t a = target_buffer_get_u32(target, params+0);
250 uint32_t l = target_buffer_get_u32(target, params+4);
253 retval = target_read_memory(target, a, 1, l, fn);
254 if (retval != ERROR_OK)
257 result = remove((char *)fn);
258 armv4_5->semihosting_errno = errno;
261 armv4_5->semihosting_errno = EINVAL;
266 case 0x0f: /* SYS_RENAME */
267 retval = target_read_memory(target, r1, 4, 4, params);
268 if (retval != ERROR_OK)
271 uint32_t a1 = target_buffer_get_u32(target, params+0);
272 uint32_t l1 = target_buffer_get_u32(target, params+4);
273 uint32_t a2 = target_buffer_get_u32(target, params+8);
274 uint32_t l2 = target_buffer_get_u32(target, params+12);
275 if (l1 <= 255 && l2 <= 255) {
276 uint8_t fn1[256], fn2[256];
277 retval = target_read_memory(target, a1, 1, l1, fn1);
278 if (retval != ERROR_OK)
280 retval = target_read_memory(target, a2, 1, l2, fn2);
281 if (retval != ERROR_OK)
285 result = rename((char *)fn1, (char *)fn2);
286 armv4_5->semihosting_errno = errno;
289 armv4_5->semihosting_errno = EINVAL;
294 case 0x11: /* SYS_TIME */
298 case 0x13: /* SYS_ERRNO */
299 result = armv4_5->semihosting_errno;
302 case 0x15: /* SYS_GET_CMDLINE */
303 retval = target_read_memory(target, r1, 4, 2, params);
304 if (retval != ERROR_OK)
307 uint32_t a = target_buffer_get_u32(target, params+0);
308 uint32_t l = target_buffer_get_u32(target, params+4);
309 char *arg = "foobar";
310 uint32_t s = strlen(arg) + 1;
314 retval = target_write_buffer(target, a, s, (void*)arg);
315 if (retval != ERROR_OK)
322 case 0x16: /* SYS_HEAPINFO */
323 retval = target_read_memory(target, r1, 4, 1, params);
324 if (retval != ERROR_OK)
327 uint32_t a = target_buffer_get_u32(target, params+0);
328 /* tell the remote we have no idea */
329 memset(params, 0, 4*4);
330 retval = target_write_memory(target, a, 4, 4, params);
331 if (retval != ERROR_OK)
337 case 0x18: /* angel_SWIreason_ReportException */
339 case 0x20026: /* ADP_Stopped_ApplicationExit */
340 fprintf(stderr, "semihosting: *** application exited ***\n");
342 case 0x20000: /* ADP_Stopped_BranchThroughZero */
343 case 0x20001: /* ADP_Stopped_UndefinedInstr */
344 case 0x20002: /* ADP_Stopped_SoftwareInterrupt */
345 case 0x20003: /* ADP_Stopped_PrefetchAbort */
346 case 0x20004: /* ADP_Stopped_DataAbort */
347 case 0x20005: /* ADP_Stopped_AddressException */
348 case 0x20006: /* ADP_Stopped_IRQ */
349 case 0x20007: /* ADP_Stopped_FIQ */
350 case 0x20020: /* ADP_Stopped_BreakPoint */
351 case 0x20021: /* ADP_Stopped_WatchPoint */
352 case 0x20022: /* ADP_Stopped_StepComplete */
353 case 0x20023: /* ADP_Stopped_RunTimeErrorUnknown */
354 case 0x20024: /* ADP_Stopped_InternalError */
355 case 0x20025: /* ADP_Stopped_UserInterruption */
356 case 0x20027: /* ADP_Stopped_StackOverflow */
357 case 0x20028: /* ADP_Stopped_DivisionByZero */
358 case 0x20029: /* ADP_Stopped_OSSpecific */
360 fprintf(stderr, "semihosting: exception %#x\n",
363 return target_call_event_callbacks(target, TARGET_EVENT_HALTED);
365 case 0x0d: /* SYS_TMPNAM */
366 case 0x10: /* SYS_CLOCK */
367 case 0x12: /* SYS_SYSTEM */
368 case 0x17: /* angel_SWIreason_EnterSVC */
369 case 0x30: /* SYS_ELAPSED */
370 case 0x31: /* SYS_TICKFREQ */
372 fprintf(stderr, "semihosting: unsupported call %#x\n",
375 armv4_5->semihosting_errno = ENOTSUP;
378 /* resume execution to the original mode */
379 buf_set_u32(armv4_5->core_cache->reg_list[0].value, 0, 32, result);
380 armv4_5->core_cache->reg_list[0].dirty = 1;
381 buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, lr);
382 armv4_5->core_cache->reg_list[15].dirty = 1;
383 buf_set_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32, spsr);
384 armv4_5->core_cache->reg_list[ARMV4_5_CPSR].dirty = 1;
385 armv4_5->core_mode = spsr & 0x1f;
387 armv4_5->core_state = ARMV4_5_STATE_THUMB;
388 return target_resume(target, 1, 0, 0, 0);
392 * Checks for and processes an ARM semihosting request. This is meant
393 * to be called when the target is stopped due to a debug mode entry.
394 * If the value 0 is returned then there was nothing to process. A non-zero
395 * return value signifies that a request was processed and the target resumed,
396 * or an error was encountered, in which case the caller must return
399 * @param target Pointer to the ARM target to process
400 * @param retval Pointer to a location where the return code will be stored
401 * @return non-zero value if a request was processed or an error encountered
403 int arm_semihosting(struct target *target, int *retval)
405 struct arm *armv4_5 = target_to_armv4_5(target);
408 if (!armv4_5->is_semihosting ||
409 armv4_5->core_mode != ARMV4_5_MODE_SVC ||
410 buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) != 0x08)
413 lr = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, ARMV4_5_MODE_SVC, 14).value, 0, 32);
414 spsr = buf_get_u32(armv4_5->spsr->value, 0, 32);
416 /* check instruction that triggered this trap */
417 if (spsr & (1 << 5)) {
418 /* was in Thumb mode */
421 *retval = target_read_memory(target, lr-2, 2, 1, insn_buf);
422 if (*retval != ERROR_OK)
424 insn = target_buffer_get_u16(target, insn_buf);
428 /* was in ARM mode */
431 *retval = target_read_memory(target, lr-4, 4, 1, insn_buf);
432 if (*retval != ERROR_OK)
434 insn = target_buffer_get_u32(target, insn_buf);
435 if (insn != 0xEF123456)
439 *retval = do_semihosting(target);