- added support for error handlers to JTAG scan commands (jtag_[plain_][ir|dr]_scan)
[fw/openocd] / src / target / arm966e.c
1 /***************************************************************************
2  *   Copyright (C) 2005 by Dominic Rath                                    *
3  *   Dominic.Rath@gmx.de                                                   *
4  *                                                                         *
5  *   This program is free software; you can redistribute it and/or modify  *
6  *   it under the terms of the GNU General Public License as published by  *
7  *   the Free Software Foundation; either version 2 of the License, or     *
8  *   (at your option) any later version.                                   *
9  *                                                                         *
10  *   This program is distributed in the hope that it will be useful,       *
11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
13  *   GNU General Public License for more details.                          *
14  *                                                                         *
15  *   You should have received a copy of the GNU General Public License     *
16  *   along with this program; if not, write to the                         *
17  *   Free Software Foundation, Inc.,                                       *
18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
19  ***************************************************************************/
20 #ifdef HAVE_CONFIG_H
21 #include "config.h"
22 #endif
23
24 #include "arm966e.h"
25
26 #include "arm7_9_common.h"
27 #include "register.h"
28 #include "target.h"
29 #include "armv4_5.h"
30 #include "embeddedice.h"
31 #include "log.h"
32 #include "jtag.h"
33 #include "arm_jtag.h"
34
35 #include <stdlib.h>
36 #include <string.h>
37
38 #if 0
39 #define _DEBUG_INSTRUCTION_EXECUTION_
40 #endif
41
42 /* cli handling */
43 int arm966e_register_commands(struct command_context_s *cmd_ctx);
44
45 /* forward declarations */
46 int arm966e_deassert_reset(target_t *target);
47 int arm966e_assert_reset(target_t *target);
48 int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
49 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
50 int arm966e_quit(void);
51
52 target_type_t arm966e_target =
53 {
54         .name = "arm966e",
55
56         .poll = arm7_9_poll,
57         .arch_state = armv4_5_arch_state,
58
59         .halt = arm7_9_halt,
60         .resume = arm7_9_resume,
61         .step = arm7_9_step,
62
63         .assert_reset = arm966e_assert_reset,
64         .deassert_reset = arm966e_deassert_reset,
65         .soft_reset_halt = arm7_9_soft_reset_halt,
66         .prepare_reset_halt = arm7_9_prepare_reset_halt,
67
68         .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
69
70         .read_memory = arm7_9_read_memory,
71         .write_memory = arm7_9_write_memory,
72         .bulk_write_memory = arm7_9_bulk_write_memory,
73
74         .run_algorithm = armv4_5_run_algorithm,
75         
76         .add_breakpoint = arm7_9_add_breakpoint,
77         .remove_breakpoint = arm7_9_remove_breakpoint,
78         .add_watchpoint = arm7_9_add_watchpoint,
79         .remove_watchpoint = arm7_9_remove_watchpoint,
80
81         .register_commands = arm966e_register_commands,
82         .target_command = arm966e_target_command,
83         .init_target = arm966e_init_target,
84         .quit = arm966e_quit,
85 };
86
87 int arm966e_assert_reset(target_t *target)
88 {
89         int retval;
90         
91         DEBUG("target->state: %s", target_state_strings[target->state]);
92         
93         if (target->state == TARGET_HALTED || target->state == TARGET_UNKNOWN)
94         {
95                 /* assert SRST and TRST */
96                 /* system would get ouf sync if we didn't reset test-logic, too */
97                 if ((retval = jtag_add_reset(1, 1)) != ERROR_OK)
98                 {
99                         if (retval == ERROR_JTAG_RESET_CANT_SRST)
100                         {
101                                 WARNING("can't assert srst");
102                                 return retval;
103                         }
104                         else
105                         {
106                                 ERROR("unknown error");
107                                 exit(-1);
108                         }
109                 }
110                 jtag_add_sleep(5000);
111                 if ((retval = jtag_add_reset(0, 1)) != ERROR_OK)
112                 {
113                         if (retval == ERROR_JTAG_RESET_WOULD_ASSERT_TRST)
114                         {
115                                 WARNING("srst resets test logic, too");
116                                 retval = jtag_add_reset(1, 1);
117                         }
118                 }
119         }
120         else
121         {
122                 if ((retval = jtag_add_reset(0, 1)) != ERROR_OK)
123                 {
124                         if (retval == ERROR_JTAG_RESET_WOULD_ASSERT_TRST)
125                         {
126                                 WARNING("srst resets test logic, too");
127                                 retval = jtag_add_reset(1, 1);
128                         }
129                         
130                         if (retval == ERROR_JTAG_RESET_CANT_SRST)
131                         {
132                                 WARNING("can't assert srst");
133                                 return retval;
134                         }
135                         else if (retval != ERROR_OK)
136                         {
137                                 ERROR("unknown error");
138                                 exit(-1);
139                         }
140                 }
141         }
142         
143         target->state = TARGET_RESET;
144         jtag_add_sleep(50000);
145         
146         armv4_5_invalidate_core_regs(target);
147         
148         return ERROR_OK;
149 }
150
151 int arm966e_deassert_reset(target_t *target)
152 {
153         arm7_9_deassert_reset( target );
154         
155         return ERROR_OK;
156 }
157
158 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
159 {
160         arm9tdmi_init_target(cmd_ctx, target);
161                 
162         return ERROR_OK;
163 }
164
165 int arm966e_quit(void)
166 {
167         
168         return ERROR_OK;
169 }
170
171 int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, int chain_pos, char *variant)
172 {
173         arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common;
174         
175         arm9tdmi_init_arch_info(target, arm9tdmi, chain_pos, variant);
176
177         arm9tdmi->arch_info = arm966e;
178         arm966e->common_magic = ARM966E_COMMON_MAGIC;
179         
180         return ERROR_OK;
181 }
182
183 int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target)
184 {
185         int chain_pos;
186         char *variant = NULL;
187         arm966e_common_t *arm966e = malloc(sizeof(arm966e_common_t));
188         
189         if (argc < 4)
190         {
191                 ERROR("'target arm966e' requires at least one additional argument");
192                 exit(-1);
193         }
194         
195         chain_pos = strtoul(args[3], NULL, 0);
196         
197         if (argc >= 5)
198                 variant = args[4];
199         
200         DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
201         
202         arm966e_init_arch_info(target, arm966e, chain_pos, variant);
203
204         return ERROR_OK;
205 }
206
207 int arm966e_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm9tdmi_common_t **arm9tdmi_p, arm966e_common_t **arm966e_p)
208 {
209         armv4_5_common_t *armv4_5 = target->arch_info;
210         arm7_9_common_t *arm7_9;
211         arm9tdmi_common_t *arm9tdmi;
212         arm966e_common_t *arm966e;
213         
214         if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
215         {
216                 return -1;
217         }
218         
219         arm7_9 = armv4_5->arch_info;
220         if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC)
221         {
222                 return -1;
223         }
224         
225         arm9tdmi = arm7_9->arch_info;
226         if (arm9tdmi->common_magic != ARM9TDMI_COMMON_MAGIC)
227         {
228                 return -1;
229         }
230         
231         arm966e = arm9tdmi->arch_info;
232         if (arm966e->common_magic != ARM966E_COMMON_MAGIC)
233         {
234                 return -1;
235         }
236         
237         *armv4_5_p = armv4_5;
238         *arm7_9_p = arm7_9;
239         *arm9tdmi_p = arm9tdmi;
240         *arm966e_p = arm966e;
241         
242         return ERROR_OK;
243 }
244
245 int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
246 {
247         armv4_5_common_t *armv4_5 = target->arch_info;
248         arm7_9_common_t *arm7_9 = armv4_5->arch_info;
249         arm_jtag_t *jtag_info = &arm7_9->jtag_info;
250         scan_field_t fields[3];
251         u8 reg_addr_buf = reg_addr & 0x3f;
252         u8 nr_w_buf = 0;
253         
254         jtag_add_end_state(TAP_RTI);
255         arm_jtag_scann(jtag_info, 0xf);
256         arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
257
258         fields[0].device = jtag_info->chain_pos;
259         fields[0].num_bits = 32;
260         fields[0].out_value = NULL;
261         fields[0].out_mask = NULL;
262         fields[0].in_value = NULL;
263         fields[0].in_check_value = NULL;
264         fields[0].in_check_mask = NULL;
265         fields[0].in_handler = NULL;
266         fields[0].in_handler_priv = NULL;
267
268         fields[1].device = jtag_info->chain_pos;
269         fields[1].num_bits = 6;
270         fields[1].out_value = &reg_addr_buf;
271         fields[1].out_mask = NULL;
272         fields[1].in_value = NULL;
273         fields[1].in_check_value = NULL;
274         fields[1].in_check_mask = NULL;
275         fields[1].in_handler = NULL;
276         fields[1].in_handler_priv = NULL;
277
278         fields[2].device = jtag_info->chain_pos;
279         fields[2].num_bits = 1;
280         fields[2].out_value = &nr_w_buf;
281         fields[2].out_mask = NULL;
282         fields[2].in_value = NULL;
283         fields[2].in_check_value = NULL;
284         fields[2].in_check_mask = NULL;
285         fields[2].in_handler = NULL;
286         fields[2].in_handler_priv = NULL;
287         
288         jtag_add_dr_scan(3, fields, -1, NULL);
289
290         fields[0].in_value = (u8*)value;
291
292         jtag_add_dr_scan(3, fields, -1, NULL);
293
294         return ERROR_OK;
295 }
296
297 int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
298 {
299         armv4_5_common_t *armv4_5 = target->arch_info;
300         arm7_9_common_t *arm7_9 = armv4_5->arch_info;
301         arm_jtag_t *jtag_info = &arm7_9->jtag_info;
302         scan_field_t fields[3];
303         u8 reg_addr_buf = reg_addr & 0x3f;
304         u8 nr_w_buf = 1;
305         
306         jtag_add_end_state(TAP_RTI);
307         arm_jtag_scann(jtag_info, 0xf);
308         arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
309
310         fields[0].device = jtag_info->chain_pos;
311         fields[0].num_bits = 32;
312         fields[0].out_value = (u8*)&value;
313         fields[0].out_mask = NULL;
314         fields[0].in_value = NULL;
315         fields[0].in_check_value = NULL;
316         fields[0].in_check_mask = NULL;
317         fields[0].in_handler = NULL;
318         fields[0].in_handler_priv = NULL;
319
320         fields[1].device = jtag_info->chain_pos;
321         fields[1].num_bits = 6;
322         fields[1].out_value = &reg_addr_buf;
323         fields[1].out_mask = NULL;
324         fields[1].in_value = NULL;
325         fields[1].in_check_value = NULL;
326         fields[1].in_check_mask = NULL;
327         fields[1].in_handler = NULL;
328         fields[1].in_handler_priv = NULL;
329
330         fields[2].device = jtag_info->chain_pos;
331         fields[2].num_bits = 1;
332         fields[2].out_value = &nr_w_buf;
333         fields[2].out_mask = NULL;
334         fields[2].in_value = NULL;
335         fields[2].in_check_value = NULL;
336         fields[2].in_check_mask = NULL;
337         fields[2].in_handler = NULL;
338         fields[2].in_handler_priv = NULL;
339         
340         jtag_add_dr_scan(3, fields, -1, NULL);
341
342         return ERROR_OK;
343 }
344
345 int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
346 {
347         int retval;
348         target_t *target = get_current_target(cmd_ctx);
349         armv4_5_common_t *armv4_5;
350         arm7_9_common_t *arm7_9;
351         arm9tdmi_common_t *arm9tdmi;
352         arm966e_common_t *arm966e;
353         arm_jtag_t *jtag_info;
354
355         if (arm966e_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm966e) != ERROR_OK)
356         {
357                 command_print(cmd_ctx, "current target isn't an ARM966e target");
358                 return ERROR_OK;
359         }
360         
361         jtag_info = &arm7_9->jtag_info;
362         
363         if (target->state != TARGET_HALTED)
364         {
365                 command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
366                 return ERROR_OK;
367         }
368
369         /* one or more argument, access a single register (write if second argument is given */
370         if (argc >= 1)
371         {
372                 int address = strtoul(args[0], NULL, 0);
373
374                 if (argc == 1)
375                 {
376                         u32 value;
377                         if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK)
378                         {
379                                 command_print(cmd_ctx, "couldn't access reg %i", address);
380                                 return ERROR_OK;
381                         }
382                         jtag_execute_queue();
383                         
384                         command_print(cmd_ctx, "%i: %8.8x", address, value);
385                 }
386                 else if (argc == 2)
387                 {
388                         u32 value = strtoul(args[1], NULL, 0);
389                         if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK)
390                         {
391                                 command_print(cmd_ctx, "couldn't access reg %i", address);
392                                 return ERROR_OK;
393                         }
394                         command_print(cmd_ctx, "%i: %8.8x", address, value);
395                 }
396         }
397
398         return ERROR_OK;
399 }
400
401 int arm966e_register_commands(struct command_context_s *cmd_ctx)
402 {
403         int retval;
404         command_t *arm966e_cmd;
405         
406         retval = arm7_9_register_commands(cmd_ctx);
407         arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", NULL, COMMAND_ANY, "arm966e specific commands");
408         register_command(cmd_ctx, arm966e_cmd, "cp15", arm966e_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <num> [value]");
409         
410         return ERROR_OK;
411 }