1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
20 ***************************************************************************/
27 #include "target_type.h"
28 #include "arm_opcodes.h"
31 #define _DEBUG_INSTRUCTION_EXECUTION_
34 int arm966e_init_arch_info(struct target *target, struct arm966e_common *arm966e, struct jtag_tap *tap)
36 struct arm7_9_common *arm7_9 = &arm966e->arm7_9_common;
38 /* initialize arm7/arm9 specific info (including armv4_5) */
39 arm9tdmi_init_arch_info(target, arm7_9, tap);
41 arm966e->common_magic = ARM966E_COMMON_MAGIC;
43 /* The ARM966E-S implements the ARMv5TE architecture which
44 * has the BKPT instruction, so we don't have to use a watchpoint comparator
46 arm7_9->arm_bkpt = ARMV5_BKPT(0x0);
47 arm7_9->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;
52 static int arm966e_target_create(struct target *target, Jim_Interp *interp)
54 struct arm966e_common *arm966e = calloc(1, sizeof(struct arm966e_common));
56 return arm966e_init_arch_info(target, arm966e, target->tap);
59 static void arm966e_deinit_target(struct target *target)
61 struct arm *arm = target_to_arm(target);
62 struct arm966e_common *arm966e = target_to_arm966(target);
64 arm7_9_deinit(target);
65 arm_free_reg_cache(arm);
69 static int arm966e_verify_pointer(struct command_invocation *cmd,
70 struct arm966e_common *arm966e)
72 if (arm966e->common_magic != ARM966E_COMMON_MAGIC) {
73 command_print(cmd, "target is not an ARM966");
74 return ERROR_TARGET_INVALID;
80 * REVISIT: The "read_cp15" and "write_cp15" commands could hook up
81 * to eventual mrc() and mcr() routines ... the reg_addr values being
82 * constructed (for CP15 only) from Opcode_1, Opcode_2, and CRn values.
83 * See section 7.3 of the ARM966E-S TRM.
86 static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *value)
88 int retval = ERROR_OK;
89 struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
90 struct arm_jtag *jtag_info = &arm7_9->jtag_info;
91 struct scan_field fields[3];
92 uint8_t reg_addr_buf = reg_addr & 0x3f;
95 retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
96 if (retval != ERROR_OK)
98 retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_IDLE);
99 if (retval != ERROR_OK)
102 fields[0].num_bits = 32;
103 /* REVISIT: table 7-2 shows that bits 31-31 need to be
104 * specified for accessing BIST registers ...
106 fields[0].out_value = NULL;
107 fields[0].in_value = NULL;
109 fields[1].num_bits = 6;
110 fields[1].out_value = ®_addr_buf;
111 fields[1].in_value = NULL;
113 fields[2].num_bits = 1;
114 fields[2].out_value = &nr_w_buf;
115 fields[2].in_value = NULL;
117 jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
119 fields[1].in_value = (uint8_t *)value;
121 jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
123 jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
126 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
127 retval = jtag_execute_queue();
128 if (retval != ERROR_OK)
130 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
136 /* EXPORTED to str9x (flash) */
137 int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value)
139 int retval = ERROR_OK;
140 struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
141 struct arm_jtag *jtag_info = &arm7_9->jtag_info;
142 struct scan_field fields[3];
143 uint8_t reg_addr_buf = reg_addr & 0x3f;
144 uint8_t nr_w_buf = 1;
145 uint8_t value_buf[4];
147 buf_set_u32(value_buf, 0, 32, value);
149 retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
150 if (retval != ERROR_OK)
152 retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_IDLE);
153 if (retval != ERROR_OK)
156 fields[0].num_bits = 32;
157 fields[0].out_value = value_buf;
158 fields[0].in_value = NULL;
160 fields[1].num_bits = 6;
161 fields[1].out_value = ®_addr_buf;
162 fields[1].in_value = NULL;
164 fields[2].num_bits = 1;
165 fields[2].out_value = &nr_w_buf;
166 fields[2].in_value = NULL;
168 jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
170 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
171 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
177 COMMAND_HANDLER(arm966e_handle_cp15_command)
180 struct target *target = get_current_target(CMD_CTX);
181 struct arm966e_common *arm966e = target_to_arm966(target);
183 retval = arm966e_verify_pointer(CMD, arm966e);
184 if (retval != ERROR_OK)
187 if (target->state != TARGET_HALTED) {
188 command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
192 /* one or more argument, access a single register (write if second argument is given */
195 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
199 retval = arm966e_read_cp15(target, address, &value);
200 if (retval != ERROR_OK) {
202 "couldn't access reg %" PRIu32,
206 retval = jtag_execute_queue();
207 if (retval != ERROR_OK)
210 command_print(CMD, "%" PRIu32 ": %8.8" PRIx32,
212 } else if (CMD_ARGC == 2) {
214 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
215 retval = arm966e_write_cp15(target, address, value);
216 if (retval != ERROR_OK) {
218 "couldn't access reg %" PRIu32,
222 command_print(CMD, "%" PRIu32 ": %8.8" PRIx32,
230 static const struct command_registration arm966e_exec_command_handlers[] = {
233 .handler = arm966e_handle_cp15_command,
234 .mode = COMMAND_EXEC,
235 .usage = "regnum [value]",
236 .help = "display/modify cp15 register",
238 COMMAND_REGISTRATION_DONE
241 const struct command_registration arm966e_command_handlers[] = {
243 .chain = arm9tdmi_command_handlers,
248 .help = "arm966e command group",
250 .chain = arm966e_exec_command_handlers,
252 COMMAND_REGISTRATION_DONE
255 /** Holds methods for ARM966 targets. */
256 struct target_type arm966e_target = {
260 .arch_state = arm_arch_state,
262 .target_request_data = arm7_9_target_request_data,
265 .resume = arm7_9_resume,
268 .assert_reset = arm7_9_assert_reset,
269 .deassert_reset = arm7_9_deassert_reset,
270 .soft_reset_halt = arm7_9_soft_reset_halt,
272 .get_gdb_arch = arm_get_gdb_arch,
273 .get_gdb_reg_list = arm_get_gdb_reg_list,
275 .read_memory = arm7_9_read_memory,
276 .write_memory = arm7_9_write_memory_opt,
278 .checksum_memory = arm_checksum_memory,
279 .blank_check_memory = arm_blank_check_memory,
281 .run_algorithm = armv4_5_run_algorithm,
283 .add_breakpoint = arm7_9_add_breakpoint,
284 .remove_breakpoint = arm7_9_remove_breakpoint,
285 .add_watchpoint = arm7_9_add_watchpoint,
286 .remove_watchpoint = arm7_9_remove_watchpoint,
288 .commands = arm966e_command_handlers,
289 .target_create = arm966e_target_create,
290 .init_target = arm9tdmi_init_target,
291 .deinit_target = arm966e_deinit_target,
292 .examine = arm7_9_examine,
293 .check_reset = arm7_9_check_reset,