1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
26 #include "arm7_9_common.h"
30 #include "embeddedice.h"
39 #define _DEBUG_INSTRUCTION_EXECUTION_
43 int arm966e_register_commands(struct command_context_s *cmd_ctx);
45 /* forward declarations */
46 int arm966e_target_create(struct target_s *target, Jim_Interp *interp);
47 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
48 int arm966e_quit(void);
50 target_type_t arm966e_target =
55 .arch_state = armv4_5_arch_state,
57 .target_request_data = arm7_9_target_request_data,
60 .resume = arm7_9_resume,
63 .assert_reset = arm7_9_assert_reset,
64 .deassert_reset = arm7_9_deassert_reset,
65 .soft_reset_halt = arm7_9_soft_reset_halt,
67 .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
69 .read_memory = arm7_9_read_memory,
70 .write_memory = arm7_9_write_memory,
71 .bulk_write_memory = arm7_9_bulk_write_memory,
72 .checksum_memory = arm7_9_checksum_memory,
73 .blank_check_memory = arm7_9_blank_check_memory,
75 .run_algorithm = armv4_5_run_algorithm,
77 .add_breakpoint = arm7_9_add_breakpoint,
78 .remove_breakpoint = arm7_9_remove_breakpoint,
79 .add_watchpoint = arm7_9_add_watchpoint,
80 .remove_watchpoint = arm7_9_remove_watchpoint,
82 .register_commands = arm966e_register_commands,
83 .target_create = arm966e_target_create,
84 .init_target = arm966e_init_target,
85 .examine = arm9tdmi_examine,
89 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
91 arm9tdmi_init_target(cmd_ctx, target);
96 int arm966e_quit(void)
102 int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, int chain_pos, const char *variant)
104 arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common;
105 arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
107 arm9tdmi_init_arch_info(target, arm9tdmi, chain_pos, variant);
109 arm9tdmi->arch_info = arm966e;
110 arm966e->common_magic = ARM966E_COMMON_MAGIC;
112 /* The ARM966E-S implements the ARMv5TE architecture which
113 * has the BKPT instruction, so we don't have to use a watchpoint comparator
115 arm7_9->arm_bkpt = ARMV5_BKPT(0x0);
116 arm7_9->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;
121 int arm966e_target_create( struct target_s *target, Jim_Interp *interp )
123 arm966e_common_t *arm966e = calloc(1,sizeof(arm966e_common_t));
125 arm966e_init_arch_info(target, arm966e, target->chain_position, target->variant);
130 int arm966e_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm9tdmi_common_t **arm9tdmi_p, arm966e_common_t **arm966e_p)
132 armv4_5_common_t *armv4_5 = target->arch_info;
133 arm7_9_common_t *arm7_9;
134 arm9tdmi_common_t *arm9tdmi;
135 arm966e_common_t *arm966e;
137 if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
142 arm7_9 = armv4_5->arch_info;
143 if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC)
148 arm9tdmi = arm7_9->arch_info;
149 if (arm9tdmi->common_magic != ARM9TDMI_COMMON_MAGIC)
154 arm966e = arm9tdmi->arch_info;
155 if (arm966e->common_magic != ARM966E_COMMON_MAGIC)
160 *armv4_5_p = armv4_5;
162 *arm9tdmi_p = arm9tdmi;
163 *arm966e_p = arm966e;
168 int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
170 armv4_5_common_t *armv4_5 = target->arch_info;
171 arm7_9_common_t *arm7_9 = armv4_5->arch_info;
172 arm_jtag_t *jtag_info = &arm7_9->jtag_info;
173 scan_field_t fields[3];
174 u8 reg_addr_buf = reg_addr & 0x3f;
177 jtag_add_end_state(TAP_RTI);
178 arm_jtag_scann(jtag_info, 0xf);
179 arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
181 fields[0].device = jtag_info->chain_pos;
182 fields[0].num_bits = 32;
183 fields[0].out_value = NULL;
184 fields[0].out_mask = NULL;
185 fields[0].in_value = NULL;
186 fields[0].in_check_value = NULL;
187 fields[0].in_check_mask = NULL;
188 fields[0].in_handler = NULL;
189 fields[0].in_handler_priv = NULL;
191 fields[1].device = jtag_info->chain_pos;
192 fields[1].num_bits = 6;
193 fields[1].out_value = ®_addr_buf;
194 fields[1].out_mask = NULL;
195 fields[1].in_value = NULL;
196 fields[1].in_check_value = NULL;
197 fields[1].in_check_mask = NULL;
198 fields[1].in_handler = NULL;
199 fields[1].in_handler_priv = NULL;
201 fields[2].device = jtag_info->chain_pos;
202 fields[2].num_bits = 1;
203 fields[2].out_value = &nr_w_buf;
204 fields[2].out_mask = NULL;
205 fields[2].in_value = NULL;
206 fields[2].in_check_value = NULL;
207 fields[2].in_check_mask = NULL;
208 fields[2].in_handler = NULL;
209 fields[2].in_handler_priv = NULL;
211 jtag_add_dr_scan(3, fields, -1);
213 fields[0].in_handler_priv = value;
214 fields[0].in_handler = arm_jtag_buf_to_u32;
216 jtag_add_dr_scan(3, fields, -1);
218 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
219 jtag_execute_queue();
220 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
226 int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
228 armv4_5_common_t *armv4_5 = target->arch_info;
229 arm7_9_common_t *arm7_9 = armv4_5->arch_info;
230 arm_jtag_t *jtag_info = &arm7_9->jtag_info;
231 scan_field_t fields[3];
232 u8 reg_addr_buf = reg_addr & 0x3f;
236 buf_set_u32(value_buf, 0, 32, value);
238 jtag_add_end_state(TAP_RTI);
239 arm_jtag_scann(jtag_info, 0xf);
240 arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
242 fields[0].device = jtag_info->chain_pos;
243 fields[0].num_bits = 32;
244 fields[0].out_value = value_buf;
245 fields[0].out_mask = NULL;
246 fields[0].in_value = NULL;
247 fields[0].in_check_value = NULL;
248 fields[0].in_check_mask = NULL;
249 fields[0].in_handler = NULL;
250 fields[0].in_handler_priv = NULL;
252 fields[1].device = jtag_info->chain_pos;
253 fields[1].num_bits = 6;
254 fields[1].out_value = ®_addr_buf;
255 fields[1].out_mask = NULL;
256 fields[1].in_value = NULL;
257 fields[1].in_check_value = NULL;
258 fields[1].in_check_mask = NULL;
259 fields[1].in_handler = NULL;
260 fields[1].in_handler_priv = NULL;
262 fields[2].device = jtag_info->chain_pos;
263 fields[2].num_bits = 1;
264 fields[2].out_value = &nr_w_buf;
265 fields[2].out_mask = NULL;
266 fields[2].in_value = NULL;
267 fields[2].in_check_value = NULL;
268 fields[2].in_check_mask = NULL;
269 fields[2].in_handler = NULL;
270 fields[2].in_handler_priv = NULL;
272 jtag_add_dr_scan(3, fields, -1);
274 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
275 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
281 int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
284 target_t *target = get_current_target(cmd_ctx);
285 armv4_5_common_t *armv4_5;
286 arm7_9_common_t *arm7_9;
287 arm9tdmi_common_t *arm9tdmi;
288 arm966e_common_t *arm966e;
289 arm_jtag_t *jtag_info;
291 if (arm966e_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm966e) != ERROR_OK)
293 command_print(cmd_ctx, "current target isn't an ARM966e target");
297 jtag_info = &arm7_9->jtag_info;
299 if (target->state != TARGET_HALTED)
301 command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
305 /* one or more argument, access a single register (write if second argument is given */
308 int address = strtoul(args[0], NULL, 0);
313 if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK)
315 command_print(cmd_ctx, "couldn't access reg %i", address);
318 jtag_execute_queue();
320 command_print(cmd_ctx, "%i: %8.8x", address, value);
324 u32 value = strtoul(args[1], NULL, 0);
325 if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK)
327 command_print(cmd_ctx, "couldn't access reg %i", address);
330 command_print(cmd_ctx, "%i: %8.8x", address, value);
337 int arm966e_register_commands(struct command_context_s *cmd_ctx)
340 command_t *arm966e_cmd;
342 retval = arm9tdmi_register_commands(cmd_ctx);
343 arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", NULL, COMMAND_ANY, "arm966e specific commands");
344 register_command(cmd_ctx, arm966e_cmd, "cp15", arm966e_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <num> [value]");
350 * Local Variables: ***
351 * c-basic-offset: 4 ***