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   1 /***************************************************************************
   2  *   Copyright (C) 2005 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
   6  *   oyvind.harboe@zylin.com                                               *
   7  *                                                                         *
   8  *   Copyright (C) 2008 by Spencer Oliver                                  *
   9  *   spen@spen-soft.co.uk                                                  *
  10  *                                                                         *
  11  *   Copyright (C) 2008 by Hongtao Zheng                                   *
  12  *   hontor@126.com                                                        *
  13  *                                                                         *
  14  *   This program is free software; you can redistribute it and/or modify  *
  15  *   it under the terms of the GNU General Public License as published by  *
  16  *   the Free Software Foundation; either version 2 of the License, or     *
  17  *   (at your option) any later version.                                   *
  18  *                                                                         *
  19  *   This program is distributed in the hope that it will be useful,       *
  20  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  21  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  22  *   GNU General Public License for more details.                          *
  23  *                                                                         *
  24  *   You should have received a copy of the GNU General Public License     *
  25  *   along with this program; if not, write to the                         *
  26  *   Free Software Foundation, Inc.,                                       *
  27  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  28  ***************************************************************************/
  29 #ifndef ARM7_9_COMMON_H
  30 #define ARM7_9_COMMON_H
  31
  32 #include "armv4_5.h"
  33 #include "arm_jtag.h"
  34 #include "breakpoints.h"
  35 #include "target.h"
  36
  37 #include "etm.h"
  38
  39 #define ARM7_9_COMMON_MAGIC 0x0a790a79
  40
  41 typedef struct arm7_9_common_s
  42 {
  43         int common_magic;
  44
  45         arm_jtag_t jtag_info;
  46         reg_cache_t *eice_cache;
  47
  48         u32 arm_bkpt;
  49         u16 thumb_bkpt;
  50         int sw_breakpoints_added;
  51         int breakpoint_count;
  52         int wp_available;
  53         int wp_available_max;
  54         int wp0_used;
  55         int wp1_used;
  56         int wp1_used_default;
  57         int force_hw_bkpts;
  58         int dbgreq_adjust_pc;
  59         int use_dbgrq;
  60         int need_bypass_before_restart;
  61
  62         etm_context_t *etm_ctx;
  63
  64         int has_single_step;
  65         int has_monitor_mode;
  66         int has_vector_catch;
  67
  68         int debug_entry_from_reset;
  69
  70         struct working_area_s *dcc_working_area;
  71
  72         int fast_memory_access;
  73         int dcc_downloads;
  74
  75         int (*examine_debug_reason)(target_t *target);
  76
  77         void (*change_to_arm)(target_t *target, u32 *r0, u32 *pc);
  78
  79         void (*read_core_regs)(target_t *target, u32 mask, u32 *core_regs[16]);
  80         void (*read_core_regs_target_buffer)(target_t *target, u32 mask, void *buffer, int size);
  81         void (*read_xpsr)(target_t *target, u32 *xpsr, int spsr);
  82
  83         void (*write_xpsr)(target_t *target, u32 xpsr, int spsr);
  84         void (*write_xpsr_im8)(target_t *target, u8 xpsr_im, int rot, int spsr);
  85         void (*write_core_regs)(target_t *target, u32 mask, u32 core_regs[16]);
  86
  87         void (*load_word_regs)(target_t *target, u32 mask);
  88         void (*load_hword_reg)(target_t *target, int num);
  89         void (*load_byte_reg)(target_t *target, int num);
  90
  91         void (*store_word_regs)(target_t *target, u32 mask);
  92         void (*store_hword_reg)(target_t *target, int num);
  93         void (*store_byte_reg)(target_t *target, int num);
  94
  95         void (*write_pc)(target_t *target, u32 pc);
  96         void (*branch_resume)(target_t *target);
  97         void (*branch_resume_thumb)(target_t *target);
  98
  99         void (*enable_single_step)(target_t *target, u32 next_pc);
 100         void (*disable_single_step)(target_t *target);
 101
 102         void (*set_special_dbgrq)(target_t *target);
 103
 104         void (*pre_debug_entry)(target_t *target);
 105         void (*post_debug_entry)(target_t *target);
 106
 107         void (*pre_restore_context)(target_t *target);
 108         void (*post_restore_context)(target_t *target);
 109
 110         armv4_5_common_t armv4_5_common;
 111         void *arch_info;
 112
 113 } arm7_9_common_t;
 114
 115 int arm7_9_register_commands(struct command_context_s *cmd_ctx);
 116
 117 int arm7_9_poll(target_t *target);
 118
 119 int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer);
 120
 121 int arm7_9_setup(target_t *target);
 122 int arm7_9_assert_reset(target_t *target);
 123 int arm7_9_deassert_reset(target_t *target);
 124 int arm7_9_reset_request_halt(target_t *target);
 125 int arm7_9_early_halt(target_t *target);
 126 int arm7_9_soft_reset_halt(struct target_s *target);
 127 int arm7_9_prepare_reset_halt(struct target_s *target);
 128
 129 int arm7_9_halt(target_t *target);
 130 int arm7_9_debug_entry(target_t *target);
 131 int arm7_9_full_context(target_t *target);
 132 int arm7_9_restore_context(target_t *target);
 133 int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
 134 int arm7_9_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
 135 int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode);
 136 int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
 137 int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
 138 int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer);
 139 int arm7_9_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum);
 140 int arm7_9_blank_check_memory(struct target_s *target, u32 address, u32 count, u32* blank);
 141
 142 int arm7_9_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_prams, reg_param_t *reg_param, u32 entry_point, void *arch_info);
 143
 144 int arm7_9_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
 145 int arm7_9_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
 146 int arm7_9_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
 147 int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
 148
 149 void arm7_9_enable_eice_step(target_t *target, u32 next_pc);
 150 void arm7_9_disable_eice_step(target_t *target);
 151
 152 int arm7_9_execute_sys_speed(struct target_s *target);
 153
 154 int arm7_9_init_arch_info(target_t *target, arm7_9_common_t *arm7_9);
 155 int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p);
 156
 157
 158 #endif /* ARM7_9_COMMON_H */