target/arc: fix clang static analyzer warnings
[fw/openocd] / src / target / arc.h
1 /***************************************************************************
2  *   Copyright (C) 2013-2015,2019-2020 Synopsys, Inc.                      *
3  *   Frank Dols <frank.dols@synopsys.com>                                  *
4  *   Mischa Jonker <mischa.jonker@synopsys.com>                            *
5  *   Anton Kolesov <anton.kolesov@synopsys.com>                            *
6  *   Evgeniy Didin <didin@synopsys.com>                                    *
7  *                                                                         *
8  *   SPDX-License-Identifier: GPL-2.0-or-later                             *
9  ***************************************************************************/
10
11 #ifndef OPENOCD_TARGET_ARC_H
12 #define OPENOCD_TARGET_ARC_H
13
14 #include <helper/time_support.h>
15 #include <jtag/jtag.h>
16
17 #include "algorithm.h"
18 #include "breakpoints.h"
19 #include "jtag/interface.h"
20 #include "register.h"
21 #include "target.h"
22 #include "target_request.h"
23 #include "target_type.h"
24 #include "helper/bits.h"
25
26 #include "arc_jtag.h"
27 #include "arc_cmd.h"
28 #include "arc_mem.h"
29
30 #define ARC_COMMON_MAGIC        0xB32EB324  /* just a unique number */
31
32 #define AUX_DEBUG_REG                   0x5
33 #define AUX_PC_REG                      0x6
34 #define AUX_STATUS32_REG                0xA
35
36 #define SET_CORE_FORCE_HALT             BIT(1)
37 #define SET_CORE_HALT_BIT               BIT(0)      /* STATUS32[0] = H field */
38 #define SET_CORE_ENABLE_INTERRUPTS                      BIT(31)
39
40 #define AUX_STATUS32_REG_HALT_BIT       BIT(0)
41 #define AUX_STATUS32_REG_IE_BIT         BIT(31)    /* STATUS32[31] = IE field */
42
43 /* Reserved core registers */
44 #define CORE_R61_NUM                    (61)
45 #define CORE_R62_NUM                    (62)
46
47 #define CORE_REG_MAX_NUMBER             (63)
48
49 /* Limit reg_type/reg_type_field  name to 20 symbols */
50 #define REG_TYPE_MAX_NAME_LENGTH        20
51
52 struct arc_reg_bitfield {
53         struct reg_data_type_bitfield bitfield;
54         char name[REG_TYPE_MAX_NAME_LENGTH];
55 };
56 /* Register data type */
57 struct arc_reg_data_type {
58         struct list_head list;
59         struct reg_data_type data_type;
60         struct reg_data_type_flags data_type_flags;
61         struct reg_data_type_struct data_type_struct;
62         char data_type_id[REG_TYPE_MAX_NAME_LENGTH];
63         struct arc_reg_bitfield *bitfields;
64         union {
65                 struct reg_data_type_struct_field *reg_type_struct_field;
66                 struct reg_data_type_flags_field *reg_type_flags_field;
67         };
68 };
69
70
71
72 /* Standard GDB register types */
73 static const struct reg_data_type standard_gdb_types[] = {
74         { .type = REG_TYPE_INT,         .id = "int" },
75         { .type = REG_TYPE_INT8,        .id = "int8" },
76         { .type = REG_TYPE_INT16,       .id = "int16" },
77         { .type = REG_TYPE_INT32,       .id = "int32" },
78         { .type = REG_TYPE_INT64,       .id = "int64" },
79         { .type = REG_TYPE_INT128,      .id = "int128" },
80         { .type = REG_TYPE_UINT8,       .id = "uint8" },
81         { .type = REG_TYPE_UINT16,      .id = "uint16" },
82         { .type = REG_TYPE_UINT32,      .id = "uint32" },
83         { .type = REG_TYPE_UINT64,      .id = "uint64" },
84         { .type = REG_TYPE_UINT128,     .id = "uint128" },
85         { .type = REG_TYPE_CODE_PTR,    .id = "code_ptr" },
86         { .type = REG_TYPE_DATA_PTR,    .id = "data_ptr" },
87         { .type = REG_TYPE_FLOAT,       .id = "float" },
88         { .type = REG_TYPE_IEEE_SINGLE, .id = "ieee_single" },
89         { .type = REG_TYPE_IEEE_DOUBLE, .id = "ieee_double" },
90 };
91
92
93 struct arc_common {
94         uint32_t common_magic;
95
96         struct arc_jtag jtag_info;
97
98         struct reg_cache *core_and_aux_cache;
99         struct reg_cache *bcr_cache;
100
101         /* Indicate if cach was built (for deinit function) */
102         bool core_aux_cache_built;
103         bool bcr_cache_built;
104         /* Closely Coupled memory(CCM) regions for performance-critical
105          * code (optional). */
106         uint32_t iccm0_start;
107         uint32_t iccm0_end;
108         uint32_t iccm1_start;
109         uint32_t iccm1_end;
110         uint32_t dccm_start;
111         uint32_t dccm_end;
112
113         int irq_state;
114
115         /* Register descriptions */
116         struct list_head reg_data_types;
117         struct list_head core_reg_descriptions;
118         struct list_head aux_reg_descriptions;
119         struct list_head bcr_reg_descriptions;
120         unsigned long num_regs;
121         unsigned long num_core_regs;
122         unsigned long num_aux_regs;
123         unsigned long num_bcr_regs;
124         unsigned long last_general_reg;
125
126         /* PC register location in register cache. */
127         unsigned long pc_index_in_cache;
128         /* DEBUG register location in register cache. */
129         unsigned long debug_index_in_cache;
130 };
131
132 /* Borrowed from nds32.h */
133 #define CHECK_RETVAL(action)                    \
134         do {                                    \
135                 int __retval = (action);        \
136                 if (__retval != ERROR_OK) {     \
137                         LOG_DEBUG("error while calling \"%s\"", \
138                                 # action);     \
139                         return __retval;        \
140                 }                               \
141         } while (0)
142
143 #define JIM_CHECK_RETVAL(action)                \
144         do {                                    \
145                 int __retval = (action);        \
146                 if (__retval != JIM_OK) {       \
147                         LOG_DEBUG("error while calling \"%s\"", \
148                                 # action);     \
149                         return __retval;        \
150                 }                               \
151         } while (0)
152
153 static inline struct arc_common *target_to_arc(struct target *target)
154 {
155         return target->arch_info;
156 }
157
158
159 /* ARC Register description */
160 struct arc_reg_desc {
161
162         struct target *target;
163
164         /* Register name */
165         char *name;
166
167         /* Actual place of storing reg_value */
168         uint8_t reg_value[4];
169
170         /* Actual place of storing register feature */
171         struct reg_feature feature;
172
173         /* GDB XML feature */
174         char *gdb_xml_feature;
175
176         /* Is this a register in g/G-packet? */
177         bool is_general;
178
179         /* Architectural number: core reg num or AUX reg num */
180         uint32_t arch_num;
181
182         /* Core or AUX register? */
183         bool is_core;
184
185         /* Build configuration register? */
186         bool is_bcr;
187
188         /* Data type */
189         struct reg_data_type *data_type;
190
191         struct list_head list;
192 };
193
194 /* Error codes */
195 #define ERROR_ARC_REGISTER_NOT_FOUND       (-700)
196 #define ERROR_ARC_REGISTER_FIELD_NOT_FOUND (-701)
197 #define ERROR_ARC_REGISTER_IS_NOT_STRUCT   (-702)
198 #define ERROR_ARC_FIELD_IS_NOT_BITFIELD    (-703)
199 #define ERROR_ARC_REGTYPE_NOT_FOUND        (-704)
200
201 void free_reg_desc(struct arc_reg_desc *r);
202
203
204 void arc_reg_data_type_add(struct target *target,
205                 struct arc_reg_data_type *data_type);
206
207 int arc_reg_add(struct target *target, struct arc_reg_desc *arc_reg,
208                 const char * const type_name, const size_t type_name_len);
209
210 struct reg *arc_reg_get_by_name(struct reg_cache *first,
211                                         const char *name, bool search_all);
212
213 int arc_reg_get_field(struct target *target, const char *reg_name,
214                 const char *field_name, uint32_t *value_ptr);
215
216 #endif /* OPENOCD_TARGET_ARC_H */