flash/nor/at91samd: Use 32-bit register writes for ST-Link compat
[fw/openocd] / src / target / Makefile.am
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 %C%_libtarget_la_LIBADD = %D%/openrisc/libopenrisc.la \
4         %D%/riscv/libriscv.la \
5         %D%/xtensa/libxtensa.la \
6         %D%/espressif/libespressif.la
7
8 %C%_libtarget_la_CPPFLAGS = $(AM_CPPFLAGS)
9
10 STARTUP_TCL_SRCS += %D%/startup.tcl
11
12 noinst_LTLIBRARIES += %D%/libtarget.la
13 %C%_libtarget_la_SOURCES = \
14         $(TARGET_CORE_SRC) \
15         $(ARM_DEBUG_SRC) \
16         $(ARMV4_5_SRC) \
17         $(ARMV6_SRC) \
18         $(ARMV7_SRC) \
19         $(ARM_MISC_SRC) \
20         $(AVR32_SRC) \
21         $(MIPS32_SRC) \
22         $(NDS32_SRC) \
23         $(STM8_SRC) \
24         $(INTEL_IA32_SRC) \
25         $(ESIRISC_SRC) \
26         $(ARC_SRC) \
27         %D%/avrt.c \
28         %D%/dsp563xx.c \
29         %D%/dsp563xx_once.c \
30         %D%/dsp5680xx.c \
31         %D%/hla_target.c \
32         $(ARMV8_SRC) \
33         $(MIPS64_SRC)
34
35 if HAVE_CAPSTONE
36 %C%_libtarget_la_CPPFLAGS += $(CAPSTONE_CFLAGS)
37 %C%_libtarget_la_LIBADD += $(CAPSTONE_LIBS)
38 endif
39
40 TARGET_CORE_SRC = \
41         %D%/algorithm.c \
42         %D%/register.c \
43         %D%/image.c \
44         %D%/breakpoints.c \
45         %D%/target.c \
46         %D%/target_request.c \
47         %D%/testee.c \
48         %D%/semihosting_common.c \
49         %D%/smp.c \
50         %D%/rtt.c
51
52 ARMV4_5_SRC = \
53         %D%/armv4_5.c \
54         %D%/armv4_5_mmu.c \
55         %D%/armv4_5_cache.c \
56         $(ARM7_9_SRC)
57
58 ARM7_9_SRC = \
59         %D%/arm7_9_common.c \
60         %D%/arm7tdmi.c \
61         %D%/arm720t.c \
62         %D%/arm9tdmi.c \
63         %D%/arm920t.c \
64         %D%/arm966e.c \
65         %D%/arm946e.c \
66         %D%/arm926ejs.c \
67         %D%/feroceon.c
68
69 ARM_MISC_SRC = \
70         %D%/fa526.c \
71         %D%/xscale.c
72
73 ARMV6_SRC = \
74         %D%/arm11.c \
75         %D%/arm11_dbgtap.c
76
77 ARMV7_SRC = \
78         %D%/armv7m.c \
79         %D%/armv7m_trace.c \
80         %D%/cortex_m.c \
81         %D%/armv7a.c \
82         %D%/armv7a_mmu.c \
83         %D%/cortex_a.c \
84         %D%/ls1_sap.c \
85         %D%/mem_ap.c
86
87 ARMV8_SRC = \
88         %D%/armv8_dpm.c \
89         %D%/armv8_opcodes.c \
90         %D%/aarch64.c \
91         %D%/a64_disassembler.c \
92         %D%/armv8.c \
93         %D%/armv8_cache.c
94
95 ARM_DEBUG_SRC = \
96         %D%/arm_dpm.c \
97         %D%/arm_jtag.c \
98         %D%/arm_disassembler.c \
99         %D%/arm_simulator.c \
100         %D%/arm_semihosting.c \
101         %D%/arm_adi_v5.c \
102         %D%/arm_dap.c \
103         %D%/armv7a_cache.c \
104         %D%/armv7a_cache_l2x.c \
105         %D%/adi_v5_dapdirect.c \
106         %D%/adi_v5_jtag.c \
107         %D%/adi_v5_swd.c \
108         %D%/embeddedice.c \
109         %D%/trace.c \
110         %D%/etb.c \
111         %D%/etm.c \
112         %D%/etm_dummy.c \
113         %D%/arm_tpiu_swo.c \
114         %D%/arm_cti.c
115
116 AVR32_SRC = \
117         %D%/avr32_ap7k.c \
118         %D%/avr32_jtag.c \
119         %D%/avr32_mem.c \
120         %D%/avr32_regs.c
121
122 MIPS32_SRC = \
123         %D%/mips32.c \
124         %D%/mips_m4k.c \
125         %D%/mips32_pracc.c \
126         %D%/mips32_dmaacc.c \
127         %D%/mips_ejtag.c
128
129 MIPS64_SRC = \
130         %D%/mips64.c \
131         %D%/mips32_pracc.c \
132         %D%/mips64_pracc.c \
133         %D%/mips_mips64.c \
134         %D%/trace.c \
135         %D%/mips_ejtag.c
136
137 NDS32_SRC = \
138         %D%/nds32.c \
139         %D%/nds32_reg.c \
140         %D%/nds32_cmd.c \
141         %D%/nds32_disassembler.c \
142         %D%/nds32_tlb.c \
143         %D%/nds32_v2.c \
144         %D%/nds32_v3_common.c \
145         %D%/nds32_v3.c \
146         %D%/nds32_v3m.c \
147         %D%/nds32_aice.c
148
149 STM8_SRC = \
150         %D%/stm8.c
151
152 INTEL_IA32_SRC = \
153         %D%/quark_x10xx.c \
154         %D%/quark_d20xx.c \
155         %D%/lakemont.c \
156         %D%/x86_32_common.c
157
158 ESIRISC_SRC = \
159         %D%/esirisc.c \
160         %D%/esirisc_jtag.c \
161         %D%/esirisc_trace.c
162
163 ARC_SRC = \
164         %D%/arc.c \
165         %D%/arc_cmd.c \
166         %D%/arc_jtag.c \
167         %D%/arc_mem.c
168
169 %C%_libtarget_la_SOURCES += \
170         %D%/algorithm.h \
171         %D%/arm.h \
172         %D%/arm_coresight.h \
173         %D%/arm_dpm.h \
174         %D%/arm_jtag.h \
175         %D%/arm_adi_v5.h \
176         %D%/armv7a_cache.h \
177         %D%/armv7a_cache_l2x.h \
178         %D%/armv7a_mmu.h \
179         %D%/arm_disassembler.h \
180         %D%/a64_disassembler.h \
181         %D%/arm_opcodes.h \
182         %D%/arm_simulator.h \
183         %D%/arm_semihosting.h \
184         %D%/arm7_9_common.h \
185         %D%/arm7tdmi.h \
186         %D%/arm720t.h \
187         %D%/arm9tdmi.h \
188         %D%/arm920t.h \
189         %D%/arm926ejs.h \
190         %D%/arm966e.h \
191         %D%/arm946e.h \
192         %D%/arm11.h \
193         %D%/arm11_dbgtap.h \
194         %D%/armv4_5.h \
195         %D%/armv4_5_mmu.h \
196         %D%/armv4_5_cache.h \
197         %D%/armv7a.h \
198         %D%/armv7m.h \
199         %D%/armv7m_trace.h \
200         %D%/armv8.h \
201         %D%/armv8_dpm.h \
202         %D%/armv8_opcodes.h \
203         %D%/armv8_cache.h \
204         %D%/avrt.h \
205         %D%/dsp563xx.h \
206         %D%/dsp563xx_once.h \
207         %D%/dsp5680xx.h \
208         %D%/breakpoints.h \
209         %D%/cortex_m.h \
210         %D%/cortex_a.h \
211         %D%/aarch64.h \
212         %D%/embeddedice.h \
213         %D%/etb.h \
214         %D%/etm.h \
215         %D%/etm_dummy.h \
216         %D%/arm_tpiu_swo.h \
217         %D%/image.h \
218         %D%/mips32.h \
219         %D%/mips64.h \
220         %D%/mips_m4k.h \
221         %D%/mips_mips64.h \
222         %D%/mips_ejtag.h \
223         %D%/mips32_pracc.h \
224         %D%/mips32_dmaacc.h \
225         %D%/mips64_pracc.h \
226         %D%/register.h \
227         %D%/target.h \
228         %D%/target_type.h \
229         %D%/trace.h \
230         %D%/target_request.h \
231         %D%/trace.h \
232         %D%/xscale.h \
233         %D%/smp.h \
234         %D%/avr32_ap7k.h \
235         %D%/avr32_jtag.h \
236         %D%/avr32_mem.h \
237         %D%/avr32_regs.h \
238         %D%/nds32.h \
239         %D%/nds32_cmd.h \
240         %D%/nds32_disassembler.h \
241         %D%/nds32_edm.h \
242         %D%/nds32_insn.h \
243         %D%/nds32_reg.h \
244         %D%/nds32_tlb.h \
245         %D%/nds32_v2.h \
246         %D%/nds32_v3_common.h \
247         %D%/nds32_v3.h \
248         %D%/nds32_v3m.h \
249         %D%/nds32_aice.h \
250         %D%/semihosting_common.h \
251         %D%/stm8.h \
252         %D%/lakemont.h \
253         %D%/x86_32_common.h \
254         %D%/arm_cti.h \
255         %D%/esirisc.h \
256         %D%/esirisc_jtag.h \
257         %D%/esirisc_regs.h \
258         %D%/esirisc_trace.h \
259         %D%/arc.h \
260         %D%/arc_cmd.h \
261         %D%/arc_jtag.h \
262         %D%/arc_mem.h \
263         %D%/rtt.h
264
265 include %D%/openrisc/Makefile.am
266 include %D%/riscv/Makefile.am
267 include %D%/xtensa/Makefile.am
268 include %D%/espressif/Makefile.am