2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
18 #ifndef _AO_ARCH_FUNCS_H_
19 #define _AO_ARCH_FUNCS_H_
23 extern uint8_t ao_spi_mutex[STM_NUM_SPI];
25 #define AO_SPI_SPEED_FAST STM_SPI_CR1_BR_PCLK_4
26 #define AO_SPI_SPEED_1MHz STM_SPI_CR1_BR_PCLK_16
27 #define AO_SPI_SPEED_200kHz STM_SPI_CR1_BR_PCLK_256
30 ao_spi_get(uint8_t spi_index, uint32_t speed);
33 ao_spi_put(uint8_t spi_index);
36 ao_spi_send(void *block, uint16_t len, uint8_t spi_index);
39 ao_spi_send_fixed(uint8_t value, uint16_t len, uint8_t spi_index);
42 ao_spi_recv(void *block, uint16_t len, uint8_t spi_index);
45 ao_spi_duplex(void *out, void *in, uint16_t len, uint8_t spi_index);
47 extern uint16_t ao_spi_speed[STM_NUM_SPI];
52 #define ao_spi_get_mask(reg,mask,bus, speed) do { \
53 ao_spi_get(bus, speed); \
54 (reg)->bsrr = ((uint32_t) mask) << 16; \
57 #define ao_spi_put_mask(reg,mask,bus) do { \
62 #define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
63 #define ao_spi_put_bit(reg,bit,pin,bus) ao_spi_put_mask(reg,(1<<bit),bus)
65 #define ao_enable_port(port) do { \
66 if ((port) == &stm_gpioa) \
67 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN); \
68 else if ((port) == &stm_gpiob) \
69 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN); \
70 else if ((port) == &stm_gpioc) \
71 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN); \
72 else if ((port) == &stm_gpiod) \
73 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN); \
74 else if ((port) == &stm_gpioe) \
75 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOEEN); \
79 #define ao_gpio_set(port, bit, pin, v) stm_gpio_set(port, bit, v)
81 #define ao_enable_output(port,bit,pin,v) do { \
82 ao_enable_port(port); \
83 ao_gpio_set(port, bit, pin, v); \
84 stm_moder_set(port, bit, STM_MODER_OUTPUT);\
87 #define ao_enable_cs(port,bit) do { \
88 stm_gpio_set((port), bit, 1); \
89 stm_moder_set((port), bit, STM_MODER_OUTPUT); \
92 #define ao_spi_init_cs(port, mask) do { \
93 ao_enable_port(port); \
94 if ((mask) & 0x0001) ao_enable_cs(port, 0); \
95 if ((mask) & 0x0002) ao_enable_cs(port, 1); \
96 if ((mask) & 0x0004) ao_enable_cs(port, 2); \
97 if ((mask) & 0x0008) ao_enable_cs(port, 3); \
98 if ((mask) & 0x0010) ao_enable_cs(port, 4); \
99 if ((mask) & 0x0020) ao_enable_cs(port, 5); \
100 if ((mask) & 0x0040) ao_enable_cs(port, 6); \
101 if ((mask) & 0x0080) ao_enable_cs(port, 7); \
102 if ((mask) & 0x0100) ao_enable_cs(port, 8); \
103 if ((mask) & 0x0200) ao_enable_cs(port, 9); \
104 if ((mask) & 0x0400) ao_enable_cs(port, 10);\
105 if ((mask) & 0x0800) ao_enable_cs(port, 11);\
106 if ((mask) & 0x1000) ao_enable_cs(port, 12);\
107 if ((mask) & 0x2000) ao_enable_cs(port, 13);\
108 if ((mask) & 0x4000) ao_enable_cs(port, 14);\
109 if ((mask) & 0x8000) ao_enable_cs(port, 15);\
115 extern uint8_t ao_dma_done[STM_NUM_DMA];
118 ao_dma_set_transfer(uint8_t index,
119 volatile void *peripheral,
125 ao_dma_set_isr(uint8_t index, void (*isr)(int index));
128 ao_dma_start(uint8_t index);
131 ao_dma_done_transfer(uint8_t index);
134 ao_dma_abort(uint8_t index);
137 ao_dma_alloc(uint8_t index);
145 ao_i2c_get(uint8_t i2c_index);
148 ao_i2c_start(uint8_t i2c_index, uint16_t address);
151 ao_i2c_put(uint8_t i2c_index);
154 ao_i2c_send(void *block, uint16_t len, uint8_t i2c_index, uint8_t stop);
157 ao_i2c_recv(void *block, uint16_t len, uint8_t i2c_index, uint8_t stop);
162 #endif /* _AO_ARCH_FUNCS_H_ */