2 * File: stlink-common.h
3 * Bulk import from stlink-hw.h
5 * This should contain all the common top level stlink interfaces, regardless
6 * of how the backend does the work....
9 #ifndef STLINK_COMMON_H
10 #define STLINK_COMMON_H
18 // Max data transfer size.
19 // 6kB = max mem32_read block, 8kB sram
20 //#define Q_BUF_LEN 96
21 #define Q_BUF_LEN 1024 * 100
23 // st-link vendor cmd's
24 #define USB_ST_VID 0x0483
25 #define USB_STLINK_PID 0x3744
26 #define USB_STLINK_32L_PID 0x3748
28 // STLINK_DEBUG_RESETSYS, etc:
29 #define STLINK_OK 0x80
30 #define STLINK_FALSE 0x81
31 #define STLINK_CORE_RUNNING 0x80
32 #define STLINK_CORE_HALTED 0x81
33 #define STLINK_CORE_STAT_UNKNOWN -1
35 #define STLINK_GET_VERSION 0xf1
36 #define STLINK_GET_CURRENT_MODE 0xf5
38 #define STLINK_DEBUG_COMMAND 0xF2
39 #define STLINK_DFU_COMMAND 0xF3
40 #define STLINK_DFU_EXIT 0x07
41 // enter dfu could be 0x08?
43 // STLINK_GET_CURRENT_MODE
44 #define STLINK_DEV_DFU_MODE 0x00
45 #define STLINK_DEV_MASS_MODE 0x01
46 #define STLINK_DEV_DEBUG_MODE 0x02
47 #define STLINK_DEV_UNKNOWN_MODE -1
50 #define STLINK_DEBUG_ENTER 0x20
51 #define STLINK_DEBUG_EXIT 0x21
52 #define STLINK_DEBUG_READCOREID 0x22
53 #define STLINK_DEBUG_GETSTATUS 0x01
54 #define STLINK_DEBUG_FORCEDEBUG 0x02
55 #define STLINK_DEBUG_RESETSYS 0x03
56 #define STLINK_DEBUG_READALLREGS 0x04
57 #define STLINK_DEBUG_READREG 0x05
58 #define STLINK_DEBUG_WRITEREG 0x06
59 #define STLINK_DEBUG_READMEM_32BIT 0x07
60 #define STLINK_DEBUG_WRITEMEM_32BIT 0x08
61 #define STLINK_DEBUG_RUNCORE 0x09
62 #define STLINK_DEBUG_STEPCORE 0x0a
63 #define STLINK_DEBUG_SETFP 0x0b
64 #define STLINK_DEBUG_WRITEMEM_8BIT 0x0d
65 #define STLINK_DEBUG_CLEARFP 0x0e
66 #define STLINK_DEBUG_WRITEDEBUGREG 0x0f
67 #define STLINK_DEBUG_ENTER_SWD 0xa3
68 #define STLINK_DEBUG_ENTER_JTAG 0x00
70 // TODO - possible poor names...
71 #define STLINK_SWD_ENTER 0x30
72 #define STLINK_SWD_READCOREID 0x32 // TBD
74 // cortex m3 technical reference manual
75 #define CM3_REG_CPUID 0xE000ED00
76 #define CM3_REG_FP_CTRL 0xE0002000
77 #define CM3_REG_FP_COMP0 0xE0002008
88 typedef uint32_t stm32_addr_t;
90 typedef struct _cortex_m3_cpuid_ {
91 uint16_t implementer_id;
97 typedef struct stlink_version_ {
105 typedef struct flash_loader {
106 stm32_addr_t loader_addr; /* loader sram adddr */
107 stm32_addr_t buf_addr; /* buffer sram address */
110 enum transport_type {
111 TRANSPORT_TYPE_ZERO = 0,
112 TRANSPORT_TYPE_LIBSG,
113 TRANSPORT_TYPE_LIBUSB,
114 TRANSPORT_TYPE_INVALID
117 typedef struct _stlink stlink_t;
119 typedef struct _stlink_backend {
120 void (*close) (stlink_t * sl);
121 void (*exit_debug_mode) (stlink_t * sl);
122 void (*enter_swd_mode) (stlink_t * sl);
123 void (*enter_jtag_mode) (stlink_t * stl);
124 void (*exit_dfu_mode) (stlink_t * stl);
125 void (*core_id) (stlink_t * stl);
126 void (*reset) (stlink_t * stl);
127 void (*run) (stlink_t * stl);
128 void (*status) (stlink_t * stl);
129 void (*version) (stlink_t *sl);
130 void (*read_mem32) (stlink_t *sl, uint32_t addr, uint16_t len);
131 void (*write_mem32) (stlink_t *sl, uint32_t addr, uint16_t len);
132 void (*write_mem8) (stlink_t *sl, uint32_t addr, uint16_t len);
133 void (*read_all_regs) (stlink_t *sl, reg * regp);
134 void (*read_reg) (stlink_t *sl, int r_idx, reg * regp);
135 void (*write_reg) (stlink_t *sl, uint32_t reg, int idx);
136 void (*step) (stlink_t * stl);
137 int (*current_mode) (stlink_t * stl);
138 void (*force_debug) (stlink_t *sl);
142 struct _stlink_backend *backend;
145 // Data transferred from or to device
146 unsigned char q_buf[Q_BUF_LEN];
149 // transport layer verboseness: 0 for no debug info, 10 for lots
156 /* medium density stm32 flash settings */
157 #define STM32_FLASH_BASE 0x08000000
158 #define STM32_FLASH_SIZE (128 * 1024)
159 #define STM32_FLASH_PGSZ 1024
160 stm32_addr_t flash_base;
164 /* in flash system memory */
165 #define STM32_SYSTEM_BASE 0x1ffff000
166 #define STM32_SYSTEM_SIZE (2 * 1024)
167 stm32_addr_t sys_base;
171 #define STM32_SRAM_BASE 0x20000000
172 #define STM32_SRAM_SIZE (8 * 1024)
173 stm32_addr_t sram_base;
178 // some quick and dirty logging...
179 void D(stlink_t *sl, char *txt);
180 void DD(stlink_t *sl, char *format, ...);
182 //stlink_t* stlink_quirk_open(const char *dev_name, const int verbose);
184 // delegated functions...
185 void stlink_enter_swd_mode(stlink_t *sl);
186 void stlink_enter_jtag_mode(stlink_t *sl);
187 void stlink_exit_debug_mode(stlink_t *sl);
188 void stlink_exit_dfu_mode(stlink_t *sl);
189 void stlink_close(stlink_t *sl);
190 uint32_t stlink_core_id(stlink_t *sl);
191 void stlink_reset(stlink_t *sl);
192 void stlink_run(stlink_t *sl);
193 void stlink_status(stlink_t *sl);
194 void stlink_version(stlink_t *sl);
195 void stlink_read_mem32(stlink_t *sl, uint32_t addr, uint16_t len);
196 void stlink_write_mem32(stlink_t *sl, uint32_t addr, uint16_t len);
197 void stlink_write_mem8(stlink_t *sl, uint32_t addr, uint16_t len);
198 void stlink_read_all_regs(stlink_t *sl, reg *regp);
199 void stlink_read_reg(stlink_t *sl, int r_idx, reg *regp);
200 void stlink_write_reg(stlink_t *sl, uint32_t reg, int idx);
201 void stlink_step(stlink_t *sl);
202 int stlink_current_mode(stlink_t *sl);
203 void stlink_force_debug(stlink_t *sl);
207 int stlink_erase_flash_mass(stlink_t* sl);
208 int stlink_write_flash(stlink_t* sl, stm32_addr_t address, uint8_t* data, unsigned length);
211 uint16_t stlink_chip_id(stlink_t *sl);
212 void stlink_cpu_id(stlink_t *sl, cortex_m3_cpuid_t *cpuid);
214 // privates, publics, the rest....
215 // TODO sort what is private, and what is not
216 int stlink_erase_flash_page(stlink_t* sl, stm32_addr_t page);
217 uint16_t read_uint16(const unsigned char *c, const int pt);
218 void stlink_core_stat(stlink_t *sl);
219 void stlink_print_data(stlink_t *sl);
220 unsigned int is_bigendian(void);
221 uint32_t read_uint32(const unsigned char *c, const int pt);
222 void write_uint32(unsigned char* buf, uint32_t ui);
223 void write_uint16(unsigned char* buf, uint16_t ui);
224 unsigned int is_core_halted(stlink_t *sl);
225 int write_buffer_to_sram(stlink_t *sl, flash_loader_t* fl, const uint8_t* buf, size_t size);
226 int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size);
227 int stlink_fread(stlink_t* sl, const char* path, stm32_addr_t addr, size_t size);
228 int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, const uint8_t* buf, size_t size);
232 #include "stlink-sg.h"
233 #include "stlink-usb.h"
241 #endif /* STLINK_COMMON_H */