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   1 /***************************************************************************
   2  *                                                                         *
   3  *   This program is free software; you can redistribute it and/or modify  *
   4  *   it under the terms of the GNU General Public License as published by  *
   5  *   the Free Software Foundation; either version 2 of the License, or     *
   6  *   (at your option) any later version.                                   *
   7  *                                                                         *
   8  *   This program is distributed in the hope that it will be useful,       *
   9  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  10  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  11  *   GNU General Public License for more details.                          *
  12  *                                                                         *
  13  *   You should have received a copy of the GNU General Public License     *
  14  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  15  ***************************************************************************/
  16
  17 #ifdef HAVE_CONFIG_H
  18 #include "config.h"
  19 #endif
  20
  21 #include "rtos.h"
  22 #include "rtos_standard_stackings.h"
  23 #include "target/armv7m.h"
  24
  25 static const struct stack_register_offset rtos_eCos_Cortex_M3_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
  26         { 0x0c, 32 },           /* r0   */
  27         { 0x10, 32 },           /* r1   */
  28         { 0x14, 32 },           /* r2   */
  29         { 0x18, 32 },           /* r3   */
  30         { 0x1c, 32 },           /* r4   */
  31         { 0x20, 32 },           /* r5   */
  32         { 0x24, 32 },           /* r6   */
  33         { 0x28, 32 },           /* r7   */
  34         { 0x2c, 32 },           /* r8   */
  35         { 0x30, 32 },           /* r9   */
  36         { 0x34, 32 },           /* r10  */
  37         { 0x38, 32 },           /* r11  */
  38         { 0x3c, 32 },           /* r12  */
  39         { -2,   32 },           /* sp   */
  40         { -1,   32 },           /* lr   */
  41         { 0x40, 32 },           /* pc   */
  42         { -1,   32 },           /* xPSR */
  43 };
  44
  45 const struct rtos_register_stacking rtos_eCos_Cortex_M3_stacking = {
  46         0x44,                                   /* stack_registers_size */
  47         -1,                                             /* stack_growth_direction */
  48         ARMV7M_NUM_CORE_REGS,   /* num_output_registers */
  49         rtos_generic_stack_align8,      /* stack_alignment */
  50         rtos_eCos_Cortex_M3_stack_offsets       /* register_offsets */
  51 };