2 mcs51 specific general functions.
4 Note that mlh prepended _mcs51_ on the static functions. Makes
5 it easier to set a breakpoint using the debugger.
11 #include "dbuf_string.h"
12 #include "../SDCCutil.h"
14 static char _defaultRules[] =
19 #define OPTION_STACK_SIZE "--stack-size"
21 static OPTION _mcs51_options[] =
23 { 0, OPTION_STACK_SIZE, &options.stack_size, "Tells the linker to allocate this space for stack", CLAT_INTEGER },
24 { 0, "--parms-in-bank1", &options.parms_in_bank1, "use Bank1 for parameter passing"},
25 { 0, "--pack-iram", NULL, "Tells the linker to pack variables in internal ram (default)"},
26 { 0, "--no-pack-iram", &options.no_pack_iram, "Tells the linker not to pack variables in internal ram"},
27 { 0, "--acall-ajmp", &options.acall_ajmp, "Use acall/ajmp instead of lcall/ljmp" },
31 /* list of key words used by msc51 */
32 static char *_mcs51_keywords[] =
66 void mcs51_assignRegisters (ebbIndex *);
68 static int regParmFlg = 0; /* determine if we can register a parameter */
69 static int regBitParmFlg = 0; /* determine if we can register a bit parameter */
74 asm_addTree (&asm_asxxxx_mapping);
78 _mcs51_reset_regparm (void)
85 _mcs51_regparm (sym_link * l, bool reentrant)
87 if (IS_SPEC(l) && (SPEC_NOUN(l) == V_BIT)) {
88 /* bit parameters go to b0 thru b7 */
89 if (reentrant && (regBitParmFlg < 8)) {
91 return 12 + regBitParmFlg;
95 if (options.parms_in_bank1 == 0) {
96 /* simple can pass only the first parameter in a register */
103 int size = getSize(l);
106 /* first one goes the usual way to DPTR */
107 if (regParmFlg == 0) {
111 /* second one onwards goes to RB1_0 thru RB1_7 */
112 remain = regParmFlg - 4;
113 if (size > (8 - remain)) {
118 return regParmFlg - size + 1;
123 _mcs51_parseOptions (int *pargc, char **argv, int *i)
125 /* TODO: allow port-specific command line options to specify
126 * segment names here.
132 _mcs51_finaliseOptions (void)
134 if (options.noXinitOpt) {
138 switch (options.model)
141 port->mem.default_local_map = data;
142 port->mem.default_globl_map = data;
143 port->s.gptr_size = 3;
146 port->mem.default_local_map = pdata;
147 port->mem.default_globl_map = pdata;
148 port->s.gptr_size = 3;
151 port->mem.default_local_map = xdata;
152 port->mem.default_globl_map = xdata;
153 port->s.gptr_size = 3;
156 port->mem.default_local_map = data;
157 port->mem.default_globl_map = data;
161 if (options.parms_in_bank1) {
162 addSet(&preArgvSet, Safe_strdup("-DSDCC_PARMS_IN_BANK1"));
167 _mcs51_setDefaultOptions (void)
172 _mcs51_getRegName (struct regs *reg)
180 _mcs51_genAssemblerPreamble (FILE * of)
182 if (options.parms_in_bank1) {
184 for (i=0; i < 8 ; i++ )
185 fprintf (of,"b1_%d = 0x%x \n",i,8+i);
189 /* Generate interrupt vector table. */
191 _mcs51_genIVT (struct dbuf_s * oBuf, symbol ** interrupts, int maxInterrupts)
195 dbuf_printf (oBuf, "\t%cjmp\t__sdcc_gsinit_startup\n", options.acall_ajmp?'a':'l');
196 if((options.acall_ajmp)&&(maxInterrupts)) dbuf_printf (oBuf, "\t.ds\t1\n");
198 /* now for the other interrupts */
199 for (i = 0; i < maxInterrupts; i++)
203 dbuf_printf (oBuf, "\t%cjmp\t%s\n", options.acall_ajmp?'a':'l', interrupts[i]->rname);
204 if ( i != maxInterrupts - 1 )
205 dbuf_printf (oBuf, "\t.ds\t%d\n", options.acall_ajmp?6:5);
209 dbuf_printf (oBuf, "\treti\n");
210 if ( i != maxInterrupts - 1 )
211 dbuf_printf (oBuf, "\t.ds\t7\n");
218 _mcs51_genExtraAreas(FILE *of, bool hasMain)
220 tfprintf (of, "\t!area\n", HOME_NAME);
221 tfprintf (of, "\t!area\n", "GSINIT0 (CODE)");
222 tfprintf (of, "\t!area\n", "GSINIT1 (CODE)");
223 tfprintf (of, "\t!area\n", "GSINIT2 (CODE)");
224 tfprintf (of, "\t!area\n", "GSINIT3 (CODE)");
225 tfprintf (of, "\t!area\n", "GSINIT4 (CODE)");
226 tfprintf (of, "\t!area\n", "GSINIT5 (CODE)");
227 tfprintf (of, "\t!area\n", STATIC_NAME);
228 tfprintf (of, "\t!area\n", port->mem.post_static_name);
229 tfprintf (of, "\t!area\n", CODE_NAME);
233 _mcs51_genInitStartup (FILE *of)
235 tfprintf (of, "\t!global\n", "__sdcc_gsinit_startup");
236 tfprintf (of, "\t!global\n", "__sdcc_program_startup");
237 tfprintf (of, "\t!global\n", "__start__stack");
239 if (options.useXstack)
241 tfprintf (of, "\t!global\n", "__sdcc_init_xstack");
242 tfprintf (of, "\t!global\n", "__start__xstack");
245 // if the port can copy the XINIT segment to XISEG
251 if (!getenv("SDCC_NOGENRAMCLEAR"))
252 tfprintf (of, "\t!global\n", "__mcs51_genRAMCLEAR");
256 /* Generate code to copy XINIT to XISEG */
257 static void _mcs51_genXINIT (FILE * of) {
258 tfprintf (of, "\t!global\n", "__mcs51_genXINIT");
260 if (!getenv("SDCC_NOGENRAMCLEAR"))
261 tfprintf (of, "\t!global\n", "__mcs51_genXRAMCLEAR");
265 /* Do CSE estimation */
266 static bool cseCostEstimation (iCode *ic, iCode *pdic)
268 operand *result = IC_RESULT(ic);
269 sym_link *result_type = operandType(result);
271 /* if it is a pointer then return ok for now */
272 if (IC_RESULT(ic) && IS_PTR(result_type)) return 1;
274 /* if bitwise | add & subtract then no since mcs51 is pretty good at it
275 so we will cse only if they are local (i.e. both ic & pdic belong to
276 the same basic block */
277 if (IS_BITWISE_OP(ic) || ic->op == '+' || ic->op == '-') {
278 /* then if they are the same Basic block then ok */
279 if (ic->eBBlockNum == pdic->eBBlockNum) return 1;
283 /* for others it is cheaper to do the cse */
287 /* Indicate which extended bit operations this port supports */
289 hasExtBitOp (int op, int size)
297 || (op == SWAP && size <= 2)
304 /* Indicate the expense of an access to an output storage class */
306 oclsExpense (struct memmap *oclass)
308 if (IN_FARSPACE(oclass))
317 instructionSize(char *inst, char *op1, char *op2)
319 #define ISINST(s) (strncmp(inst, (s), sizeof(s)-1) == 0)
320 #define IS_A(s) (*(s) == 'a' && *(s+1) == '\0')
321 #define IS_C(s) (*(s) == 'c' && *(s+1) == '\0')
322 #define IS_Rn(s) (*(s) == 'r' && *(s+1) >= '0' && *(s+1) <= '7')
323 #define IS_atRi(s) (*(s) == '@' && *(s+1) == 'r')
325 /* Based on the current (2003-08-22) code generation for the
326 small library, the top instruction probability is:
337 /* mov, push, & pop are the 69% of the cases. Check them first! */
340 if (*(inst+3)=='x') return 1; /* movx */
341 if (*(inst+3)=='c') return 1; /* movc */
342 if (IS_C (op1) || IS_C (op2)) return 2;
345 if (IS_Rn (op2) || IS_atRi (op2)) return 1;
348 if (IS_Rn(op1) || IS_atRi(op1))
350 if (IS_A(op2)) return 1;
353 if (strcmp (op1, "dptr") == 0) return 3;
354 if (IS_A (op2) || IS_Rn (op2) || IS_atRi (op2)) return 2;
358 if (ISINST ("push")) return 2;
359 if (ISINST ("pop")) return 2;
361 if (ISINST ("lcall")) return 3;
362 if (ISINST ("ret")) return 1;
363 if (ISINST ("ljmp")) return 3;
364 if (ISINST ("sjmp")) return 2;
365 if (ISINST ("rlc")) return 1;
366 if (ISINST ("rrc")) return 1;
367 if (ISINST ("rl")) return 1;
368 if (ISINST ("rr")) return 1;
369 if (ISINST ("swap")) return 1;
370 if (ISINST ("jc")) return 2;
371 if (ISINST ("jnc")) return 2;
372 if (ISINST ("jb")) return 3;
373 if (ISINST ("jnb")) return 3;
374 if (ISINST ("jbc")) return 3;
375 if (ISINST ("jmp")) return 1; // always jmp @a+dptr
376 if (ISINST ("jz")) return 2;
377 if (ISINST ("jnz")) return 2;
378 if (ISINST ("cjne")) return 3;
379 if (ISINST ("mul")) return 1;
380 if (ISINST ("div")) return 1;
381 if (ISINST ("da")) return 1;
382 if (ISINST ("xchd")) return 1;
383 if (ISINST ("reti")) return 1;
384 if (ISINST ("nop")) return 1;
385 if (ISINST ("acall")) return 2;
386 if (ISINST ("ajmp")) return 2;
389 if (ISINST ("add") || ISINST ("addc") || ISINST ("subb") || ISINST ("xch"))
391 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
394 if (ISINST ("inc") || ISINST ("dec"))
396 if (IS_A(op1) || IS_Rn(op1) || IS_atRi(op1)) return 1;
397 if (strcmp(op1, "dptr") == 0) return 1;
400 if (ISINST ("anl") || ISINST ("orl") || ISINST ("xrl"))
402 if (IS_C(op1)) return 2;
405 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
410 if (IS_A(op2)) return 2;
414 if (ISINST ("clr") || ISINST ("setb") || ISINST ("cpl"))
416 if (IS_A(op1) || IS_C(op1)) return 1;
421 if (IS_Rn(op1)) return 2;
425 /* If the instruction is unrecognized, we shouldn't try to optimize. */
426 /* Return a large value to discourage optimization. */
431 newAsmLineNode (void)
435 aln = Safe_alloc ( sizeof (asmLineNode));
437 aln->regsRead = NULL;
438 aln->regsWritten = NULL;
444 typedef struct mcs51operanddata
452 static mcs51operanddata mcs51operandDataTable[] =
455 {"ab", A_IDX, B_IDX},
469 {"dph", DPH_IDX, -1},
470 {"dpl", DPL_IDX, -1},
471 {"dptr", DPL_IDX, DPH_IDX},
476 {"psw", CND_IDX, -1},
488 mcs51operandCompare (const void *key, const void *member)
490 return strcmp((const char *)key, ((mcs51operanddata *)member)->name);
494 updateOpRW (asmLineNode *aln, char *op, char *optype)
496 mcs51operanddata *opdat;
499 dot = strchr(op, '.');
503 opdat = bsearch (op, mcs51operandDataTable,
504 sizeof(mcs51operandDataTable)/sizeof(mcs51operanddata),
505 sizeof(mcs51operanddata), mcs51operandCompare);
507 if (opdat && strchr(optype,'r'))
509 if (opdat->regIdx1 >= 0)
510 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx1);
511 if (opdat->regIdx2 >= 0)
512 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx2);
514 if (opdat && strchr(optype,'w'))
516 if (opdat->regIdx1 >= 0)
517 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx1);
518 if (opdat->regIdx2 >= 0)
519 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx2);
523 if (!strcmp(op, "@r0"))
524 aln->regsRead = bitVectSetBit (aln->regsRead, R0_IDX);
525 if (!strcmp(op, "@r1"))
526 aln->regsRead = bitVectSetBit (aln->regsRead, R1_IDX);
527 if (strstr(op, "dptr"))
529 aln->regsRead = bitVectSetBit (aln->regsRead, DPL_IDX);
530 aln->regsRead = bitVectSetBit (aln->regsRead, DPH_IDX);
532 if (strstr(op, "a+"))
533 aln->regsRead = bitVectSetBit (aln->regsRead, A_IDX);
537 typedef struct mcs51opcodedata
547 static mcs51opcodedata mcs51opcodeDataTable[] =
549 {"acall","j", "", "", ""},
550 {"add", "", "w", "rw", "r"},
551 {"addc", "", "rw", "rw", "r"},
552 {"ajmp", "j", "", "", ""},
553 {"anl", "", "", "rw", "r"},
554 {"cjne", "j", "w", "r", "r"},
555 {"clr", "", "", "w", ""},
556 {"cpl", "", "", "rw", ""},
557 {"da", "", "rw", "rw", ""},
558 {"dec", "", "", "rw", ""},
559 {"div", "", "w", "rw", ""},
560 {"djnz", "j", "", "rw", ""},
561 {"inc", "", "", "rw", ""},
562 {"jb", "j", "", "r", ""},
563 {"jbc", "j", "", "rw", ""},
564 {"jc", "j", "", "", ""},
565 {"jmp", "j", "", "", ""},
566 {"jnb", "j", "", "r", ""},
567 {"jnc", "j", "", "", ""},
568 {"jnz", "j", "", "", ""},
569 {"jz", "j", "", "", ""},
570 {"lcall","j", "", "", ""},
571 {"ljmp", "j", "", "", ""},
572 {"mov", "", "", "w", "r"},
573 {"movc", "", "", "w", "r"},
574 {"movx", "", "", "w", "r"},
575 {"mul", "", "w", "rw", ""},
576 {"nop", "", "", "", ""},
577 {"orl", "", "", "rw", "r"},
578 {"pop", "", "", "w", ""},
579 {"push", "", "", "r", ""},
580 {"ret", "j", "", "", ""},
581 {"reti", "j", "", "", ""},
582 {"rl", "", "", "rw", ""},
583 {"rlc", "", "rw", "rw", ""},
584 {"rr", "", "", "rw", ""},
585 {"rrc", "", "rw", "rw", ""},
586 {"setb", "", "", "w", ""},
587 {"sjmp", "j", "", "", ""},
588 {"subb", "", "rw", "rw", "r"},
589 {"swap", "", "", "rw", ""},
590 {"xch", "", "", "rw", "rw"},
591 {"xchd", "", "", "rw", "rw"},
592 {"xrl", "", "", "rw", "r"},
596 mcs51opcodeCompare (const void *key, const void *member)
598 return strcmp((const char *)key, ((mcs51opcodedata *)member)->name);
602 asmLineNodeFromLineNode (lineNode *ln)
604 asmLineNode *aln = newAsmLineNode();
605 char *op, op1[256], op2[256];
609 mcs51opcodedata *opdat;
613 while (*p && isspace(*p)) p++;
614 for (op = inst, opsize=1; *p; p++)
616 if (isspace(*p) || *p == ';' || *p == ':' || *p == '=')
619 if (opsize < sizeof(inst))
620 *op++ = tolower(*p), opsize++;
624 if (*p == ';' || *p == ':' || *p == '=')
627 while (*p && isspace(*p)) p++;
631 for (op = op1, opsize=1; *p && *p != ','; p++)
633 if (!isspace(*p) && opsize < sizeof(op1))
634 *op++ = tolower(*p), opsize++;
639 for (op = op2, opsize=1; *p && *p != ','; p++)
641 if (!isspace(*p) && opsize < sizeof(op2))
642 *op++ = tolower(*p), opsize++;
646 aln->size = instructionSize(inst, op1, op2);
648 aln->regsRead = newBitVect (END_IDX);
649 aln->regsWritten = newBitVect (END_IDX);
651 opdat = bsearch (inst, mcs51opcodeDataTable,
652 sizeof(mcs51opcodeDataTable)/sizeof(mcs51opcodedata),
653 sizeof(mcs51opcodedata), mcs51opcodeCompare);
657 updateOpRW (aln, op1, opdat->op1type);
658 updateOpRW (aln, op2, opdat->op2type);
659 if (strchr(opdat->pswtype,'r'))
660 aln->regsRead = bitVectSetBit (aln->regsRead, CND_IDX);
661 if (strchr(opdat->pswtype,'w'))
662 aln->regsWritten = bitVectSetBit (aln->regsWritten, CND_IDX);
669 getInstructionSize (lineNode *line)
672 line->aln = asmLineNodeFromLineNode (line);
674 return line->aln->size;
678 getRegsRead (lineNode *line)
681 line->aln = asmLineNodeFromLineNode (line);
683 return line->aln->regsRead;
687 getRegsWritten (lineNode *line)
690 line->aln = asmLineNodeFromLineNode (line);
692 return line->aln->regsWritten;
696 /** $1 is always the basename.
697 $2 is always the output file.
699 $l is the list of extra options that should be there somewhere...
700 MUST be terminated with a NULL.
702 static const char *_linkCmd[] =
704 "aslink", "-nf", "\"$1\"", NULL
707 /* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */
708 static const char *_asmCmd[] =
710 "asx8051", "$l", "$3", "\"$1.asm\"", NULL
718 "MCU 8051", /* Target name */
719 NULL, /* Processor name */
722 TRUE, /* Emit glue around main */
723 MODEL_SMALL | MODEL_MEDIUM | MODEL_LARGE,
729 "-plosgffc", /* Options with debug */
730 "-plosgff", /* Options without debug */
733 NULL /* no do_assemble function */
750 /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */
751 1, 2, 2, 4, 1, 2, 3, 1, 4, 4
753 /* tags for generic pointers */
754 { 0x00, 0x40, 0x60, 0x80 }, /* far, near, xstack, code */
756 "XSTK (PAG,XDATA)", // xstack_name
757 "STACK (DATA)", // istack_name
758 "CSEG (CODE)", // code_name
759 "DSEG (DATA)", // data_name
760 "ISEG (DATA)", // idata_name
761 "PSEG (PAG,XDATA)", // pdata_name
762 "XSEG (XDATA)", // xdata_name
763 "BSEG (BIT)", // bit_name
764 "RSEG (DATA)", // reg_name
765 "GSINIT (CODE)", // static_name
766 "OSEG (OVR,DATA)", // overlay_name
767 "GSFINAL (CODE)", // post_static_name
768 "HOME (CODE)", // home_name
769 "XISEG (XDATA)", // xidata_name - initialized xdata initialized xdata
770 "XINIT (CODE)", // xinit_name - a code copy of xiseg
771 "CONST (CODE)", // const_name - const data (code or not)
772 "CABS (ABS,CODE)", // cabs_name - const absolute data (code or not)
773 "XABS (ABS,XDATA)", // xabs_name - absolute xdata/pdata
774 "IABS (ABS,DATA)", // iabs_name - absolute idata/data
779 { _mcs51_genExtraAreas, NULL },
781 +1, /* direction (+1 = stack grows up) */
782 0, /* bank_overhead (switch between register banks) */
783 4, /* isr_overhead */
784 1, /* call_overhead (2 for return address - 1 for pre-incrementing push */
785 1, /* reent_overhead */
786 0 /* banked_overhead (switch between code banks) */
789 /* mcs51 has an 8 bit mul */
793 mcs51_emitDebuggerSymbol
797 2, /* sizeofElement */
798 {6,9,15}, /* sizeofMatchJump[] */
799 {9,18,36}, /* sizeofRangeCompare[] */
800 4, /* sizeofSubtract */
801 6, /* sizeofDispatch */
808 _mcs51_finaliseOptions,
809 _mcs51_setDefaultOptions,
810 mcs51_assignRegisters,
813 _mcs51_genAssemblerPreamble,
814 NULL, /* no genAssemblerEnd */
817 _mcs51_genInitStartup,
818 _mcs51_reset_regparm,
823 hasExtBitOp, /* hasExtBitOp */
824 oclsExpense, /* oclsExpense */
826 TRUE, /* little endian */
829 1, /* transform <= to ! > */
830 1, /* transform >= to ! < */
831 1, /* transform != to !(a == b) */
833 FALSE, /* No array initializer support. */
835 NULL, /* no builtin functions */
836 GPOINTER, /* treat unqualified pointers as "generic" pointers */
837 1, /* reset labelKey to 1 */
838 1, /* globals & local static allowed */